公开(公告)号：US4386352A

公开(公告)日：1983-05-31

申请号：US229846

申请日：1981-01-30

申请人： Heisaku Nonomura ,  Keiichiro Shimizu ,  Kohei Kishi ,  Hisashi Uede

发明人： Heisaku Nonomura ,  Keiichiro Shimizu ,  Kohei Kishi ,  Hisashi Uede

IPC分类号： G02F1/1362 ,  G02F1/1368 ,  G09G3/36

CPC分类号： G02F1/1368 ,  G02F1/136213

摘要： A matrix type display panel is disclosed which comprises a plurality of gate lines, a plurality of source lines normal to the gate lines, a pair of substates with one carrying a thin film transistor (TFT) array including a plurality of TFTs one for each of the intersections of the gate and source lines and the other carrying a common electrode and liquid crystal material interposed between the TFT array and the common electrode. The common electrode is supplied with the voltage of which the waveform is different between odd scanning frames and during even scanning frames. In a write mode, the source line is supplied with a pair of positive and negative pulses during the odd scanning frames and with the zero voltage during the even scanning frames. In a non-write mode, on the other hand, the source line is supplied with the zero voltage during the even scanning frames and with a pair of positive and negative pulses during the odd scanning frames.

摘要翻译： 公开了一种矩阵型显示面板，其包括多条栅极线，垂直于栅极线的多条源极线，一对具有一个薄膜晶体管（TFT）阵列的子状态，该薄膜晶体管（TFT）阵列包括多个TFT， 栅极和源极线之间的交叉点和另一个支承在TFT阵列和公共电极之间的公共电极和液晶材料。 公共电极被提供在奇数扫描帧之间和偶数扫描帧期间波形不同的电压。 在写入模式下，在奇数扫描帧期间，源极线被提供有一对正和负脉冲，并且在偶数扫描帧期间具有零电压。 另一方面，在非写入模式下，在奇数扫描帧期间，在偶数扫描帧期间，源线被提供零电压，并且在奇数扫描帧期间提供一对正和负脉冲。