公开(公告)号：US07003748B1

公开(公告)日：2006-02-21

申请号：US10452100

申请日：2003-06-01

申请人： Hengfu Hsu

发明人： Hengfu Hsu

IPC分类号： G06F17/50

CPC分类号： G06F17/5077 ,  G06F2217/78

摘要： A method for defining and producing a power grid structure of an IC that minimizes the area of the power grid structure area and the diagonal wiring blockage caused by the power grid structure while still meeting design constraints. A power grid planner is used to determine dimensions and locations of power grid components for each IC layer using a power grid formula, an objective for the power grid formula, a set of constraints, and a set of parameters. The method also includes processes of a power grid router, power grid verifier, and global signal router that are used iteratively with processes of the power grid planner to continually refine the dimensions and locations of the power grid components until the power grid structure meets design constraints and until global signal routing is successful on each layer of the IC.

公开(公告)号：US20100044875A1

公开(公告)日：2010-02-25

申请号：US12611116

申请日：2009-11-02

申请人： Hengfu Hsu

发明人： Hengfu Hsu

IPC分类号： H01L23/48 ,  G06F17/50

CPC分类号： G06F17/5068 ,  G06F2217/78

摘要： A method for defining and producing a power grid structure (having stripe, rail, and via components) of an IC. The method reduces the number of vias in the power grid structure and the diagonal wiring blockage caused by the vias while still meeting design specifications. Other embodiments provide a method for locating vias in the power grid structure in such a way as to be especially beneficial to 45° or 135° diagonal wiring paths. The method includes processes of a power grid planner, power grid router, power grid verifier, and global signal router that are used iteratively to define and produce a power grid structure. Other embodiments of the invention provide for arrangements of vias in via arrays where diagonal wiring paths are facilitated near the edges of the via arrays. A bounding box enclosing these via arrays have an aspect ratio that is approximately equal to 1.

摘要翻译： 一种用于定义和产生IC的电网结构（具有条带，轨道和通孔部件）的方法。 该方法减少了电网结构中的通孔数量和通孔导致的对角线路堵塞，同时仍符合设计规范。 其他实施例提供了一种用于在电力电网结构中定位过孔的方法，以便特别有利于45°或135°对角线的布线路径。 该方法包括迭代地用于定义和产生电网结构的电网规划器，电网路由器，电网验证器和全局信号路由器的过程。 本发明的其它实施例提供了通孔阵列中的布置布置，其中在通孔阵列的边缘附近有对角线布线路径。 封闭这些通孔阵列的边框具有近似等于1的纵横比。

公开(公告)号：US07480887B1

公开(公告)日：2009-01-20

申请号：US11339330

申请日：2006-01-23

申请人： Hengfu Hsu

发明人： Hengfu Hsu

IPC分类号： G06F17/50

CPC分类号： G06F17/5077 ,  G06F2217/78

摘要： A method for defining and producing a power grid structure of an IC that minimizes the area of the power grid structure area and the diagonal wiring blockage caused by the power grid structure while still meeting design constraints. A power grid planner is used to determine dimensions and locations of power grid components for each IC layer using a power grid formula, an objective for the power grid formula, a set of constraints, and a set of parameters. The method also includes processes of a power grid router, power grid verifier, and global signal router that are used iteratively with processes of the power grid planner to continually refine the dimensions and locations of the power grid components until the power grid structure meets design constraints and until global signal routing is successful on each layer of the IC.

摘要翻译： 一种用于定义和产生IC的电网结构的方法，其最小化电网结构区域的面积和由电网结构引起的对角线接线堵塞，同时仍然满足设计限制。 电网规划器用于使用电网公式，电网公式的目标，一组约束和一组参数来确定每个IC层的电网组件的尺寸和位置。 该方法还包括电网路由器，电网验证器和全局信号路由器的过程，其与电网规划器的过程迭代地使用以不断地改进电网组件的尺寸和位置，直到电网结构满足设计约束 并且直到IC的每个层上的全局信号路由成功。

公开(公告)号：US08245172B2

公开(公告)日：2012-08-14

申请号：US12611116

申请日：2009-11-02

申请人： Hengfu Hsu

发明人： Hengfu Hsu

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G06F2217/78

摘要： A method for defining and producing a power grid structure (having stripe, rail, and via components) of an IC. The method reduces the number of vias in the power grid structure and the diagonal wiring blockage caused by the vias while still meeting design specifications. Other embodiments provide a method for locating vias in the power grid structure in such a way as to be especially beneficial to 45° or 135° diagonal wiring paths. The method includes processes of a power grid planner, power grid router, power grid verifier, and global signal router that are used iteratively to define and produce a power grid structure. Other embodiments of the invention provide for arrangements of vias in via arrays where diagonal wiring paths are facilitated near the edges of the via arrays. A bounding box enclosing these via arrays have an aspect ratio that is approximately equal to 1.

摘要翻译： 一种用于定义和产生IC的电网结构（具有条带，轨道和通孔部件）的方法。 该方法减少了电网结构中的通孔数量和通孔导致的对角线路堵塞，同时仍符合设计规范。 其他实施例提供了一种用于在电力电网结构中定位过孔的方法，以便特别有利于45°或135°对角线的布线路径。 该方法包括迭代地用于定义和产生电网结构的电网规划器，电网路由器，电网验证器和全局信号路由器的过程。 本发明的其它实施例提供了通孔阵列中的布置布置，其中在通孔阵列的边缘附近有对角线布线路径。 封闭这些通孔阵列的边框具有近似等于1的纵横比。

公开(公告)号：US07086024B2

公开(公告)日：2006-08-01

申请号：US10452848

申请日：2003-06-01

申请人： Hengfu Hsu ,  Steven Teig ,  Akira Fujimura

发明人： Hengfu Hsu ,  Steven Teig ,  Akira Fujimura

IPC分类号： G06F17/50 ,  G06F9/45

CPC分类号： G06F17/5077 ,  H01L23/5286 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method for defining and producing a power grid structure of an IC having diagonal power and ground stripes. Stripes are placed in a 45° or 135° diagonal direction in relation to an IC layout's x-coordinate axis so that the stripes will be placed in a 45° or 135° diagonal direction, respectively, in relation to the bottom boundary of the resulting IC. The diagonal power and ground stripes are beneficial to diagonal signal wiring. The stripes may be placed across one layer of the IC or across more than one layer of the IC. The diagonal power stripes may have varying widths and/or varying spacing widths on a layer of the IC. The diagonal ground stripes may have varying widths and/or varying spacing widths on a layer of the IC.

摘要翻译： 一种用于定义和产生具有对角线功率和接地条纹的IC的电网结构的方法。 条纹相对于IC布局的x坐标轴以45°或135°对角线方向放置，使得条纹将分别相对于所得到的底部边界放置在45°或135°对角线方向 我知道了。 对角线电源和接地条纹有利于对角线信号线路。 条纹可以放置在IC的一个层上或跨越IC的多于一层的位置。 对角功率条纹可以在IC层上具有变化的宽度和/或变化的间隔宽度。 对角线条纹可以在IC层上具有变化的宽度和/或变化的间隔宽度。

公开(公告)号：US07631283B2

公开(公告)日：2009-12-08

申请号：US11780459

申请日：2007-07-19

申请人： Hengfu Hsu

发明人： Hengfu Hsu

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G06F2217/78

摘要： A method for producing a power grid structure (having stripe, rail, and via components) of an IC. The method reduces the number of vias in the power grid structure and the diagonal wiring blockage caused by the vias while still meeting design specifications. Other embodiments provide a method for locating vias in the power grid structure in such a way as to be especially beneficial to 45° or 135° diagonal wiring paths. The method includes processes of a power grid planner, power grid router, power grid verifier, and global signal router that are used iteratively to define and produce a power grid structure. Other embodiments of the invention provide for arrangements of vias in via arrays where diagonal wiring paths are facilitated near the edges of the via arrays. A bounding box enclosing these via arrays have an aspect ratio that is approximately equal to 1.

摘要翻译： 一种用于制造IC的电网结构（具有条纹，轨道和通孔部件）的方法。 该方法减少了电网结构中的通孔数量和通孔导致的对角线路堵塞，同时仍符合设计规范。 其他实施例提供了一种用于在电力电网结构中定位过孔的方法，以便特别有利于45°或135°对角线的布线路径。 该方法包括迭代地用于定义和产生电网结构的电网规划器，电网路由器，电网验证器和全局信号路由器的过程。 本发明的其它实施例提供了通孔阵列中的布置布置，其中在通孔阵列的边缘附近有对角线布线路径。 封闭这些通孔阵列的边框具有近似等于1的纵横比。

公开(公告)号：US20070294657A1

公开(公告)日：2007-12-20

申请号：US11780459

申请日：2007-07-19

申请人： Hengfu Hsu

发明人： Hengfu Hsu

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G06F2217/78

摘要： A method for producing a power grid structure (having stripe, rail, and via components) of an IC. The method reduces the number of vias in the power grid structure and the diagonal wiring blockage caused by the vias while still meeting design specifications. Other embodiments provide a method for locating vias in the power grid structure in such a way as to be especially beneficial to 45° or 135° diagonal wiring paths. The method includes processes of a power grid planner, power grid router, power grid verifier, and global signal router that are used iteratively to define and produce a power grid structure. Other embodiments of the invention provide for arrangements of vias in via arrays where diagonal wiring paths are facilitated near the edges of the via arrays. A bounding box enclosing these via arrays have an aspect ratio that is approximately equal to 1.

摘要翻译： 一种用于制造IC的电网结构（具有条纹，轨道和通孔部件）的方法。 该方法减少了电网结构中的通孔数量和通孔导致的对角线路堵塞，同时仍符合设计规范。 其他实施例提供了一种用于在电力电网结构中定位过孔的方法，以便特别有利于45°或135°对角线的布线路径。 该方法包括迭代地用于定义和产生电网结构的电网规划器，电网路由器，电网验证器和全局信号路由器的过程。 本发明的其它实施例提供了通孔阵列中的布置布置，其中在通孔阵列的边缘附近有对角线布线路径。 封闭这些通孔阵列的边框具有近似等于1的纵横比。

公开(公告)号：US07272803B1

公开(公告)日：2007-09-18

申请号：US10452189

申请日：2003-06-01

申请人： Hengfu Hsu

发明人： Hengfu Hsu

IPC分类号： G06F17/50

CPC分类号： G06F17/5068 ,  G06F2217/78

摘要： A method for defining and producing a power grid structure (having stripe, rail, and via components) of an IC. The method reduces the number of vias in the power grid structure and the diagonal wiring blockage caused by the vias while still meeting design specifications. Other embodiments provide a method for locating vias in the power grid structure in such a way as to be especially beneficial to 45° or 135° diagonal wiring paths. The method includes processes of a power grid planner, power grid router, power grid verifier, and global signal router that are used iteratively to define and produce a power grid structure. Other embodiments of the invention provide for arrangements of vias in via arrays where diagonal wiring paths are facilitated near the edges of the via arrays. A bounding box enclosing these via arrays have an aspect ratio that is approximately equal to 1.

摘要翻译： 一种用于定义和产生IC的电网结构（具有条带，轨道和通孔部件）的方法。 该方法减少了电网结构中的通孔数量和通孔导致的对角线路堵塞，同时仍符合设计规范。 其他实施例提供了一种用于在电力电网结构中定位过孔的方法，以便特别有利于45°或135°对角线的布线路径。 该方法包括迭代地用于定义和产生电网结构的电网规划器，电网路由器，电网验证器和全局信号路由器的过程。 本发明的其它实施例提供了通孔阵列中的布置布置，其中在通孔阵列的边缘附近有对角线布线路径。 封闭这些通孔阵列的边框具有近似等于1的纵横比。