Methods and apparatus for defining power grid structures having diagonal stripes
    1.
    发明授权
    Methods and apparatus for defining power grid structures having diagonal stripes 失效
    用于定义具有对角条纹的电网结构的方法和装置

    公开(公告)号:US07086024B2

    公开(公告)日:2006-08-01

    申请号:US10452848

    申请日:2003-06-01

    IPC分类号: G06F17/50 G06F9/45

    摘要: A method for defining and producing a power grid structure of an IC having diagonal power and ground stripes. Stripes are placed in a 45° or 135° diagonal direction in relation to an IC layout's x-coordinate axis so that the stripes will be placed in a 45° or 135° diagonal direction, respectively, in relation to the bottom boundary of the resulting IC. The diagonal power and ground stripes are beneficial to diagonal signal wiring. The stripes may be placed across one layer of the IC or across more than one layer of the IC. The diagonal power stripes may have varying widths and/or varying spacing widths on a layer of the IC. The diagonal ground stripes may have varying widths and/or varying spacing widths on a layer of the IC.

    摘要翻译: 一种用于定义和产生具有对角线功率和接地条纹的IC的电网结构的方法。 条纹相对于IC布局的x坐标轴以45°或135°对角线方向放置,使得条纹将分别相对于所得到的底部边界放置在45°或135°对角线方向 我知道了。 对角线电源和接地条纹有利于对角线信号线路。 条纹可以放置在IC的一个层上或跨越IC的多于一层的位置。 对角功率条纹可以在IC层上具有变化的宽度和/或变化的间隔宽度。 对角线条纹可以在IC层上具有变化的宽度和/或变化的间隔宽度。

    Multidirectional wiring on a single metal layer
    2.
    发明申请
    Multidirectional wiring on a single metal layer 审中-公开
    在单个金属层上的多向布线

    公开(公告)号:US20050240894A1

    公开(公告)日:2005-10-27

    申请号:US11031472

    申请日:2005-01-06

    IPC分类号: H01L23/528 G06F17/50

    摘要: An integrated circuit has a metal layer that includes conductors to provide interconnectivity for components of the integrated circuit chip. The metal layer is divided into at least two sections, such that a first section has a preferred direction and the second section has a preferred wiring direction that is different from the first preferred direction. The first and second preferred directions on a single metal layer may consist of any direction. The metal layer may be divided into more than two sections, wherein each section has a preferred wiring direction. Wiring geometries for multi-level metal layers are also disclosed.

    摘要翻译: 集成电路具有包括为集成电路芯片的组件提供互连的导体的金属层。 金属层被分成至少两个部分,使得第一部分具有优选的方向,并且第二部分具有不同于第一优选方向的优选的布线方向。 单个金属层上的第一和第二优选方向可由任何方向组成。 金属层可以被分成多于两个部分,其中每个部分具有优选的布线方向。 还公开了多层金属层的接线几何形状。

    Integrated circuit wiring architectures to support independent designs
    3.
    发明授权
    Integrated circuit wiring architectures to support independent designs 有权
    集成电路布线架构,支持独立设计

    公开(公告)号:US06870255B1

    公开(公告)日:2005-03-22

    申请号:US09739582

    申请日:2000-12-15

    IPC分类号: H01L23/528 H01L23/12 G06L9/45

    摘要: An integrated circuit has a metal layer that includes conductors to provide interconnectivity for components of the integrated circuit chip. The metal layer is divided into at least two sections, such that a first section has a preferred direction and the second section has a preferred wiring direction that is different from the first preferred direction. The first and second preferred directions on a single metal layer may consist of any direction. The metal layer may be divided into more than two sections, wherein each section has a preferred wiring direction. Wiring geometries for multi-level metal layers are also disclosed.

    摘要翻译: 集成电路具有包括为集成电路芯片的组件提供互连的导体的金属层。 金属层被分成至少两个部分,使得第一部分具有优选的方向,并且第二部分具有不同于第一优选方向的优选的布线方向。 单个金属层上的第一和第二优选方向可由任何方向组成。 金属层可以被分成多于两个部分,其中每个部分具有优选的布线方向。 还公开了多层金属层的接线几何形状。

    Method and system for distributing clock signals on non Manhattan semiconductor integrated circuits
    4.
    发明授权
    Method and system for distributing clock signals on non Manhattan semiconductor integrated circuits 失效
    在非曼哈顿半导体集成电路上分配时钟信号的方法和系统

    公开(公告)号:US08438525B2

    公开(公告)日:2013-05-07

    申请号:US12644001

    申请日:2009-12-21

    IPC分类号: G06F17/50

    摘要: The present invention introduces methods, systems, and architectures for routing clock signals in an integrated circuit layout. The introduced clock signal clock signal structures are rendered with non Manhattan routing. In a first embodiment, the traditional recursive H clock signal structure is rendered after transforming the coordinates system such that a rotated recursive H clock signal structure is rendered. In another embodiment, a recursive Y structure is used to create a clock signal structure. The recursive Y structure may also be implemented in a rotated alignment. For clock signal redundancy, non Manhattan wiring may be used to create a clock signal mesh network.

    摘要翻译: 本发明介绍了用于在集成电路布局中路由时钟信号的方法,系统和架构。 引入的时钟信号时钟信号结构以非曼哈顿路由呈现。 在第一实施例中,传统的递归H时钟信号结构在变换坐标系之后呈现,从而呈现旋转的递归H时钟信号结构。 在另一个实施例中,使用递归Y结构来创建时钟信号结构。 递归Y结构也可以以旋转的对准来实现。 对于时钟信号冗余,可以使用非曼哈顿布线来创建时钟信号网状网络。

    METHOD AND SYSTEM FOR DISTRIBUTING CLOCK SIGNALS ON NON MANHATTAN SEMICONDUCTOR INTEGRATED CIRCUITS
    5.
    发明申请
    METHOD AND SYSTEM FOR DISTRIBUTING CLOCK SIGNALS ON NON MANHATTAN SEMICONDUCTOR INTEGRATED CIRCUITS 失效
    在非曼哈顿半导体集成电路中分配时钟信号的方法和系统

    公开(公告)号:US20100213982A1

    公开(公告)日:2010-08-26

    申请号:US12772967

    申请日:2010-05-03

    IPC分类号: H03K19/00 G06F17/50

    摘要: The present invention introduces methods, systems, and architectures for routing clock signals in an integrated circuit layout. The introduced clock signal clock signal structures are rendered with non Manhattan routing. In a first embodiment, the traditional recursive H clock signal structure is rendered after transforming the coordinates system such that a rotated recursive H clock signal structure is rendered. In another embodiment, a recursive Y structure is used to create a clock signal structure. The recursive Y structure may also be implemented in a rotated alignment. For clock signal redundancy, non Manhattan wiring may be used to create a clock signal mesh network.

    摘要翻译: 本发明介绍了用于在集成电路布局中路由时钟信号的方法,系统和架构。 引入的时钟信号时钟信号结构以非曼哈顿路由呈现。 在第一实施例中,传统的递归H时钟信号结构在变换坐标系之后呈现,从而呈现旋转的递归H时钟信号结构。 在另一个实施例中,使用递归Y结构来创建时钟信号结构。 递归Y结构也可以以旋转的对准来实现。 对于时钟信号冗余,可以使用非曼哈顿布线来创建时钟信号网状网络。

    Method and System for Distributing Clock Signals on Non-Manhattan Semiconductor Integrated Circuits
    6.
    发明申请
    Method and System for Distributing Clock Signals on Non-Manhattan Semiconductor Integrated Circuits 失效
    在非曼哈顿半导体集成电路中分配时钟信号的方法和系统

    公开(公告)号:US20060277514A1

    公开(公告)日:2006-12-07

    申请号:US11464478

    申请日:2006-08-14

    IPC分类号: G06F17/50

    摘要: The present invention introduces methods, systems, and architectures for routing clock signals in an integrated circuit layout. The introduced clock signal clock signal structures are rendered with non Manhattan routing. In a first embodiment, the traditional recursive H clock signal structure is rendered after transforming the coordinates system such that a rotated recursive H clock signal structure is rendered. In another embodiment, a recursive Y structure is used to create a clock signal structure. The recursive Y structure may also be implemented in a rotated alignment. For clock signal redundancy, non Manhattan wiring may be used to create a clock signal mesh network.

    摘要翻译: 本发明介绍了用于在集成电路布局中路由时钟信号的方法,系统和架构。 引入的时钟信号时钟信号结构以非曼哈顿路由呈现。 在第一实施例中,传统的递归H时钟信号结构在变换坐标系之后呈现,从而呈现旋转的递归H时钟信号结构。 在另一个实施例中,使用递归Y结构来创建时钟信号结构。 递归Y结构也可以以旋转的对准来实现。 对于时钟信号冗余,可以使用非曼哈顿布线来创建时钟信号网状网络。

    Method and apparatus for creating efficient vias between metal layers in semiconductor designs and layouts
    8.
    发明授权
    Method and apparatus for creating efficient vias between metal layers in semiconductor designs and layouts 失效
    用于在半导体设计和布局中在金属层之间创建有效通孔的方法和装置

    公开(公告)号:US07263677B1

    公开(公告)日:2007-08-28

    申请号:US10335246

    申请日:2002-12-31

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5068

    摘要: A system for creating efficient vias between metal layers in semiconductor designs that employ diagonal wiring is disclosed. The system combines advantages of both octagonal shaped vias and square shaped vias. Specifically, octagonal shaped vias are ideal for integrated circuit layouts that contain diagonal wiring since the diagonal wiring may be placed closer to the center the via due to the bevel corners. However, octagonal vias are difficult to manufacture. Square vias have been traditionally used within integrated circuits and the techniques to manufacture square vias are well-known. Since the final manufactured output of an ideal square via is similar to the final output of an ideal octagonal via, one system that may be employed is to design an integrated circuit with octagonal vias and then replace those octagonal shaped vias with square vias just before manufacturing. The replacement square vias must be chose to produce an output shape that is very similar to the output of the ideal octagonal via.

    摘要翻译: 公开了一种用于在使用对角线布线的半导体设计中在金属层之间形成有效通孔的系统。 该系统结合了八角形通孔和方形通孔的优点。 具体来说,八角形通孔对于包含对角布线的集成电路布局是理想的,因为由于斜角可能将对角布线放置得更靠近通孔的中心。 然而,八角形通孔难以制造。 传统上在集成电路中使用方形通孔,并且制造方形通孔的技术是众所周知的。 由于理想正方形通孔的最终制造输出类似于理想八边形通孔的最终输出,所以可以使用的一个系统是设计具有八边形通孔的集成电路,然后在制造之前用方形通孔替换那些八角形通孔 。 必须选择替换正方形通孔以产生非常类似于理想八边形通孔输出的输出形状。

    METHOD AND SYSTEM FOR DISTRIBUTING CLOCK SIGNALS ON NON-MANHATTAN SEMICONDUCTOR INTEGRATED CIRCUITS
    9.
    发明申请
    METHOD AND SYSTEM FOR DISTRIBUTING CLOCK SIGNALS ON NON-MANHATTAN SEMICONDUCTOR INTEGRATED CIRCUITS 失效
    在非曼哈顿半导体集成电路中分配时钟信号的方法和系统

    公开(公告)号:US20070136707A1

    公开(公告)日:2007-06-14

    申请号:US11548655

    申请日:2006-10-11

    IPC分类号: G06F17/50

    摘要: The present invention introduces methods, systems, and architectures for routing clock signals in an integrated circuit layout. The introduced clock signal clock signal structures are rendered with non Manhattan routing. In a first embodiment, the traditional recursive H clock signal structure is rendered after transforming the coordinates system such that a rotated recursive H clock signal structure is rendered. In another embodiment, a recursive Y structure is used to create a clock signal structure. The recursive Y structure may also be implemented in a rotated alignment. For clock signal redundancy, non Manhattan wiring may be used to create a clock signal mesh network.

    摘要翻译: 本发明介绍了用于在集成电路布局中路由时钟信号的方法,系统和架构。 引入的时钟信号时钟信号结构以非曼哈顿路由呈现。 在第一实施例中,传统的递归H时钟信号结构在变换坐标系之后呈现,从而呈现旋转的递归H时钟信号结构。 在另一个实施例中,使用递归Y结构来创建时钟信号结构。 递归Y结构也可以以旋转的对准来实现。 对于时钟信号冗余,可以使用非曼哈顿布线来创建时钟信号网状网络。

    IC layout with non-quadrilateral Steiner points
    10.
    发明授权
    IC layout with non-quadrilateral Steiner points 有权
    具有非四边形Steiner点的IC布局

    公开(公告)号:US06895569B1

    公开(公告)日:2005-05-17

    申请号:US10066102

    申请日:2002-01-31

    IPC分类号: G06F9/45 G06F17/50

    CPC分类号: G06F17/5068

    摘要: Some embodiments of the invention provide vias that are not in shape of quadrilaterals. In some embodiments, some or all vias are in shape of non-quadrilateral polygons, such as octagons and hexagons. In some embodiments, some or all vias have a circular shape. Some embodiments provide a first set of vias that have a diamond shape and a second set of vias that have a rectangular shape. In some embodiments, a via can also be formed by a diamond contact and a rectangular contact. The diamond contact has four sides. In the embodiments described below, all four sides of a diamond via contact have equal sides. However, in other embodiments, a via contact can be in shape of a diamond with a pair of sides that are longer than the other pair of sides. Similarly, in the embodiments described below, the rectangular via contacts are squares with four equal sides. However, in other embodiments, the length and width of a rectangular via contact can differ. Some embodiments of the invention provide interconnect lines that have non-rectangular ends. In some embodiments, the interconnect-line ends are partial octagons, hexagons, and/or circles. Also, some embodiments provide Steiner points that are not rectangular. In some embodiments, the Steiner points are octagonal, hexagonal, or circles.

    摘要翻译: 本发明的一些实施例提供不具有四边形形状的通孔。 在一些实施例中,一些或所有通孔的形状为非四边形多边形,例如八边形和六边形。 在一些实施例中,一些或所有通孔具有圆形形状。 一些实施例提供具有菱形形状的第一组通孔和具有矩形形状的第二组通孔。 在一些实施例中,也可以通过金刚石触点和矩形触点形成通孔。 钻石接触有四面。 在下面描述的实施例中,钻石经过接触的所有四个侧面具有相等的边。 然而,在其他实施例中,通孔接触可以是具有比另一对侧长的一对侧面的菱形的形状。 类似地,在下面描述的实施例中,矩形通孔触点是具有四个相等边的正方形。 然而,在其他实施例中,矩形通孔接触件的长度和宽度可以不同。 本发明的一些实施例提供具有非矩形端部的互连线。 在一些实施例中,互连线端部是部分八边形,六边形和/或圆形。 而且,一些实施例提供了不是矩形的Steiner点。 在一些实施例中,Steiner点是八边形,六边形或圆形。