公开(公告)号：US08527822B2

公开(公告)日：2013-09-03

申请号：US12581651

申请日：2009-10-19

申请人： Henk Boezen ,  Leon Van de Logt ,  Liquan Fang

发明人： Henk Boezen ,  Leon Van de Logt ,  Liquan Fang

IPC分类号： G01R31/3177 ,  G01R31/40

CPC分类号： G01R31/318572 ,  G01R31/318536

摘要： An electronic circuit having a boundary scan test circuit receives, though one pin, an embedded clock encoded test signal having an encoded bit stream having occurrences of a first header followed by at least one encoded boundary scan mode bit and an encoded second header followed by at least one boundary scan test input bit. The bit stream and the clock are extracted and occurrences of the first header and second header are detected. Based on the detected occurrences the boundary scan mode bits and boundary scan input bits are identified and distributed to the electronic circuit, along with the extracted clock, and boundary scan test is performed.

摘要翻译： 具有边界扫描测试电路的电子电路通过一个引脚接收具有编码比特流的嵌入式时钟编码测试信号，所述编码比特流具有出现的第一标题，随后是至少一个编码边界扫描模式位和编码后的第二标题， 至少一个边界扫描测试输入位。 提取比特流和时钟，并检测出第一首标和第二首标的出现。 基于检测到的事件，边界扫描模式位和边界扫描输入位与提取的时钟一起识别并分配给电子电路，并进行边界扫描测试。

公开(公告)号：US20110093751A1

公开(公告)日：2011-04-21

申请号：US12581651

申请日：2009-10-19

申请人： Henk Boezen ,  Leon Van de Logt ,  Liquan Fang

发明人： Henk Boezen ,  Leon Van de Logt ,  Liquan Fang

IPC分类号： G01R31/3177 ,  G06F11/25

CPC分类号： G01R31/318572 ,  G01R31/318536

摘要： An electronic circuit having a boundary scan test circuit receives, though one pin, an embedded clock encoded test signal having an encoded bit stream having occurrences of a first header followed by at least one encoded boundary scan mode bit and an encoded second header followed by at least one boundary scan test input bit. The bit stream and the clock are extracted and occurrences of the first header and second header are detected. Based on the detected occurrences the boundary scan mode bits and boundary scan input bits are identified and distributed to the electronic circuit, along with the extracted clock, and boundary scan test is performed.

摘要翻译： 具有边界扫描测试电路的电子电路通过一个引脚接收具有编码比特流的嵌入式时钟编码测试信号，所述编码比特流具有出现的第一标题，随后是至少一个编码边界扫描模式位和编码后的第二标题， 至少一个边界扫描测试输入位。 提取比特流和时钟，并检测出第一首标和第二首标的出现。 基于检测到的事件，边界扫描模式位和边界扫描输入位与提取的时钟一起识别并分配给电子电路，并进行边界扫描测试。