公开(公告)号：US20090051035A1

公开(公告)日：2009-02-26

申请号：US12194076

申请日：2008-08-19

申请人： Hiroshige HIRANO ,  Koji TAKEMURA ,  Koji KOIKE

发明人： Hiroshige HIRANO ,  Koji TAKEMURA ,  Koji KOIKE

IPC分类号： H01L23/532

CPC分类号： H01L23/5286 ,  H01L2924/0002 ,  H01L2924/00

摘要： The semiconductor integrated circuit includes: a first wiring layer including a plurality of first interconnects formed to run in a first direction; a second wiring layer formed above the first wiring layer, the second wiring layer including a plurality of second interconnects formed to run in a second direction vertical to the first direction; and a third wiring layer formed above the second wiring layer, the third wiring layer including a plurality of third interconnects formed to run in the same direction as the second direction.

摘要翻译： 半导体集成电路包括：第一布线层，包括形成为沿第一方向延伸的多个第一互连; 形成在所述第一布线层的上方的第二布线层，所述第二布线层包括形成为沿与所述第一方向垂直的第二方向延伸的多个第二布线; 以及形成在所述第二布线层上方的第三布线层，所述第三布线层包括形成为沿与所述第二方向相同的方向延伸的多个第三布线。

公开(公告)号：US20080258266A1

公开(公告)日：2008-10-23

申请号：US12029969

申请日：2008-02-12

申请人： Koji TAKEMURA ,  Hiroshige HIRANO ,  Yutaka ITOH ,  Hikari SANO ,  Koji KOIKE

发明人： Koji TAKEMURA ,  Hiroshige HIRANO ,  Yutaka ITOH ,  Hikari SANO ,  Koji KOIKE

IPC分类号： H01L23/00 ,  H01L21/71

CPC分类号： H01L23/585 ,  H01L23/562 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device includes: an interlayer insulating film formed on a substrate; a wiring formed in the interlayer insulating film in a chip region of the substrate; a seal ring formed in the interlayer insulating film in a periphery of the chip region and continuously surrounding the chip region; and a first protective film formed on the interlayer insulating film having the wiring and the seal ring formed therein. A first opening is formed in the first protective film in a region located outside the seal ring when viewed from the chip region, and the interlayer insulating film is exposed in the first opening.

摘要翻译： 半导体器件包括：形成在衬底上的层间绝缘膜; 在衬底的芯片区域中的层间绝缘膜中形成的布线; 密封环，形成在所述芯片区域的周围的所述层间绝缘膜中，并且连续地围绕所述芯片区域; 以及形成在其上形成有布线和密封环的层间绝缘膜上的第一保护膜。 当从芯片区域观察时，在位于密封环外侧的区域中的第一保护膜中形成第一开口，并且层间绝缘膜在第一开口中露出。