摘要:
A semiconductor memory device includes: a memory cell array provided with a plurality of memory cells in a matrix; and a power supply circuit configured to supply an intermediate voltage between a power supply voltage and a ground voltage to each of the plurality of memory cells. The power supply circuit includes: a first intermediate voltage generating circuit configured to generate a first intermediate voltage between the power supply voltage and the ground voltage; a second intermediate voltage generating circuit configured to generate a second intermediate voltage between the power supply voltage and the ground voltage; a first output node to which the first intermediate voltage is supplied; a second output node to which the second intermediate voltage is supplied; and a connection control circuit provided between the first output node and the second output node. The first intermediate voltage generating circuit supplies the first intermediate voltage in response to a first control signal, and the second intermediate voltage generating circuit stops its operation in response to the first control signal. The connection control circuit connects the first output node and the second output node when the second intermediate voltage generating circuit stops its operation.
摘要:
A semiconductor memory device includes a power supply circuit configured to supply an intermediate voltage between a power supply voltage and a ground voltage to each of a plurality of memory cells. The power supply circuit firsts generates a first intermediate voltage between the power supply voltage and the ground voltage and a second intermediate voltage between the power supply voltage and the ground voltage. In response to a first control signal, the first intermediate voltage is supplied to an output node and the second intermediate voltage stops. A connection control circuit connects the first output node and a second output node when the second intermediate voltage generating circuit stops its operation.
摘要:
A semiconductor memory device includes a power supply circuit configured to supply an intermediate voltage between a power supply voltage and a ground voltage to each of a plurality of memory cells. The power supply circuit firsts generates a first intermediate voltage between the power supply voltage and the ground voltage and a second intermediate voltage between the power supply voltage and the ground voltage. In response to a first control signal, the first intermediate voltage is supplied to an output node and the second intermediate voltage stops. A connection control circuit connects the first output node and a second output node when the second intermediate voltage generating circuit stops its operation.
摘要:
A semiconductor memory device includes: a memory cell array provided with a plurality of memory cells in a matrix; and a power supply circuit configured to supply an intermediate voltage between a power supply voltage and a ground voltage to each of the plurality of memory cells.
摘要:
The entrapping immobilization pellets satisfy conditions: (A) the deformation rate expressed by (H0−H1)/H0×100 is 70% or more, where the thickness of the pellets before compression is H0 and the thickness of the pellets at the time the pellets are broken by compression is H1; and (B) the particle diameter falls within the range of 0.1 to 1.5 mm. The entrapping immobilization pellets are added to a biological treatment tank having no screen and the entrapping immobilization pellets discharged together with treated water to a solid-liquid separation tank are returned to the biological treatment tank by pumping. With this constitution, the entrapping immobilization pellets are less broken even if they are returned to the biological treatment tank by pumping, a conventional biological treatment tank in which wastewater is treated with activated sludge can be used without modification, and in addition, the particle diameter thereof can be reduced. Therefore, treatment efficiency can be markedly improved.