SEMICONDUCTOR MEMORY DEVICE
    1.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权
    半导体存储器件

    公开(公告)号:US20110096596A1

    公开(公告)日:2011-04-28

    申请号:US12912309

    申请日:2010-10-26

    IPC分类号: G11C11/34

    摘要: A semiconductor memory device includes: a memory cell array provided with a plurality of memory cells in a matrix; and a power supply circuit configured to supply an intermediate voltage between a power supply voltage and a ground voltage to each of the plurality of memory cells. The power supply circuit includes: a first intermediate voltage generating circuit configured to generate a first intermediate voltage between the power supply voltage and the ground voltage; a second intermediate voltage generating circuit configured to generate a second intermediate voltage between the power supply voltage and the ground voltage; a first output node to which the first intermediate voltage is supplied; a second output node to which the second intermediate voltage is supplied; and a connection control circuit provided between the first output node and the second output node. The first intermediate voltage generating circuit supplies the first intermediate voltage in response to a first control signal, and the second intermediate voltage generating circuit stops its operation in response to the first control signal. The connection control circuit connects the first output node and the second output node when the second intermediate voltage generating circuit stops its operation.

    摘要翻译: 半导体存储器件包括:以矩阵形式设置有多个存储单元的存储单元阵列; 以及电源电路,被配置为向所述多个存储单元中的每一个提供电源电压和接地电压之间的中间电压。 电源电路包括:第一中间电压产生电路,被配置为在电源电压和接地电压之间产生第一中间电压; 第二中间电压产生电路,被配置为在电源电压和接地电压之间产生第二中间电压; 提供第一中间电压的第一输出节点; 提供第二中间电压的第二输出节点; 以及连接控制电路,设置在第一输出节点和第二输出节点之间。 第一中间电压产生电路响应于第一控制信号提供第一中间电压,并且第二中间电压产生电路响应于第一控制信号停止其操作。 当第二中间电压产生电路停止工作时,连接控制电路连接第一输出节点和第二输出节点。

    Semiconductor memory device
    2.
    发明授权
    Semiconductor memory device 有权
    半导体存储器件

    公开(公告)号:US08526229B2

    公开(公告)日:2013-09-03

    申请号:US13610171

    申请日:2012-09-11

    IPC分类号: G11C11/34

    摘要: A semiconductor memory device includes a power supply circuit configured to supply an intermediate voltage between a power supply voltage and a ground voltage to each of a plurality of memory cells. The power supply circuit firsts generates a first intermediate voltage between the power supply voltage and the ground voltage and a second intermediate voltage between the power supply voltage and the ground voltage. In response to a first control signal, the first intermediate voltage is supplied to an output node and the second intermediate voltage stops. A connection control circuit connects the first output node and a second output node when the second intermediate voltage generating circuit stops its operation.

    摘要翻译: 半导体存储器件包括:电源电路,被配置为向多个存储单元中的每一个提供电源电压和接地电压之间的中间电压。 电源电路首先产生电源电压和接地电压之间的第一中间电压以及电源电压和接地电压之间的第二中间电压。 响应于第一控制信号,第一中间电压被提供给输出节点,并且第二中间电压停止。 当第二中间电压发生电路停止其操作时,连接控制电路连接第一输出节点和第二输出节点。

    SEMICONDUCTOR MEMORY DEVICE
    3.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权
    半导体存储器件

    公开(公告)号:US20130051172A1

    公开(公告)日:2013-02-28

    申请号:US13610171

    申请日:2012-09-11

    IPC分类号: G05F3/02 G11C5/14

    摘要: A semiconductor memory device includes a power supply circuit configured to supply an intermediate voltage between a power supply voltage and a ground voltage to each of a plurality of memory cells. The power supply circuit firsts generates a first intermediate voltage between the power supply voltage and the ground voltage and a second intermediate voltage between the power supply voltage and the ground voltage. In response to a first control signal, the first intermediate voltage is supplied to an output node and the second intermediate voltage stops. A connection control circuit connects the first output node and a second output node when the second intermediate voltage generating circuit stops its operation.

    摘要翻译: 半导体存储器件包括:电源电路,被配置为向多个存储单元中的每一个提供电源电压和接地电压之间的中间电压。 电源电路首先产生电源电压和接地电压之间的第一中间电压以及电源电压和接地电压之间的第二中间电压。 响应于第一控制信号,第一中间电压被提供给输出节点,并且第二中间电压停止。 当第二中间电压发生电路停止其操作时,连接控制电路连接第一输出节点和第二输出节点。

    Semiconductor memory device
    4.
    发明授权
    Semiconductor memory device 有权
    半导体存储器件

    公开(公告)号:US08284598B2

    公开(公告)日:2012-10-09

    申请号:US12912309

    申请日:2010-10-26

    IPC分类号: G11C11/34

    摘要: A semiconductor memory device includes: a memory cell array provided with a plurality of memory cells in a matrix; and a power supply circuit configured to supply an intermediate voltage between a power supply voltage and a ground voltage to each of the plurality of memory cells.

    摘要翻译: 半导体存储器件包括:以矩阵形式设置有多个存储单元的存储单元阵列; 以及电源电路,被配置为向所述多个存储单元中的每一个提供电源电压和接地电压之间的中间电压。

    Entrapping immobilization pellets, wastewater treatment system using the entrapping immobilization pellets and wastewater treatment method
    5.
    发明申请
    Entrapping immobilization pellets, wastewater treatment system using the entrapping immobilization pellets and wastewater treatment method 审中-公开
    包埋固定颗粒,废水处理系统采用夹带固定颗粒和废水处理方法

    公开(公告)号:US20100038311A1

    公开(公告)日:2010-02-18

    申请号:US12308957

    申请日:2006-07-06

    IPC分类号: C02F3/34 C02F3/02 C12N11/04

    摘要: The entrapping immobilization pellets satisfy conditions: (A) the deformation rate expressed by (H0−H1)/H0×100 is 70% or more, where the thickness of the pellets before compression is H0 and the thickness of the pellets at the time the pellets are broken by compression is H1; and (B) the particle diameter falls within the range of 0.1 to 1.5 mm. The entrapping immobilization pellets are added to a biological treatment tank having no screen and the entrapping immobilization pellets discharged together with treated water to a solid-liquid separation tank are returned to the biological treatment tank by pumping. With this constitution, the entrapping immobilization pellets are less broken even if they are returned to the biological treatment tank by pumping, a conventional biological treatment tank in which wastewater is treated with activated sludge can be used without modification, and in addition, the particle diameter thereof can be reduced. Therefore, treatment efficiency can be markedly improved.

    摘要翻译: 夹带固定粒料满足条件:(A)由(H0-H1)/ H0×100表示​​的变形率为70%以上,压缩前的粒料的厚度为H0,粒料的厚度为 压片破碎是H1; 和(B)粒径落在0.1〜1.5mm的范围内。 将夹带固定颗粒加入到没有筛网的生物处理槽中,并将与处理水一起排放到固液分离罐的捕集固定颗粒通过泵送返回生物处理槽。 通过这种结构,即使通过泵送将捕获固定化颗粒返回到生物处理槽也不会破坏,可以在不改变的情况下使用其中用活性污泥处理废水的常规生物处理槽,另外,粒径 可以减少。 因此,治疗效率可以显着提高。