公开(公告)号：US11778729B2

公开(公告)日：2023-10-03

申请号：US17619186

申请日：2020-06-12

Applicant: Hitachi Astemo, Ltd.

Inventor： Yasuhiro Tsuyuki ,  Toshiaki Ishii ,  Yoshio Kawai

IPC: H05K1/02

CPC classification number: H05K1/021 ,  H05K1/0209

Abstract: A temperature rise due to thermal interference between electronic components is suppressed. Electronic components (11a, 11b) are adjacently mounted on a circuit board (12). The circuit board (12) is fixed to a base (13). A rectangular convex portion (21) is provided on the base (13). The rectangular convex portion (21) is disposed so as to be located below the electronic components (11a, 11b) when the circuit board (12) is assembled to a housing (10). The rectangular convex portion (21) includes N concave portions (21a). The concave portions (21a) are arranged on a surface (21b) facing the region between the electronic components (11a, 11b).