公开(公告)号：US20210151336A1

公开(公告)日：2021-05-20

申请号：US16641329

申请日：2019-02-07

Applicant: Hitachi High-Technologies Corporation

Inventor： Yoshikazu SAIGOU ,  Yoshiro SUEMITSU ,  Hiroyuki ISHIKAWA

IPC: H01L21/67 ,  H01L21/677 ,  H01L21/683

Abstract: Provided is a technique capable of implementing efficient transport and processing related to multi-step processing in the case of a link-type vacuum processing apparatus with related to an operating method of a vacuum processing apparatus. The operating method of the vacuum processing apparatus according to the embodiment, in order to minimize time required for all processing of a plurality of wafers in a multi-step processing, includes a first step (steps 601 to 607) of selecting one first processing unit and one second processing unit from a plurality of processing units for each wafer and determining a transport schedule including a transport path using the selected processing units. In the first step, for at least one wafer, a transport schedule including a transport path is configured using the selected first processing unit by excluding at least one first processing unit from the plurality of first processing units. The operating method selects an optimal transport schedule when a second step is rate-limited.