CHIP PACKAGE ASSEMBLY, ELECTRONIC DEVICE, AND PREPARATION METHOD OF CHIP PACKAGE ASSEMBLY

    公开(公告)号:US20230021432A1

    公开(公告)日:2023-01-26

    申请号:US17872473

    申请日:2022-07-25

    Abstract: This application discloses a chip package assembly, an electronic device, and a preparation method of a chip package assembly. The chip package assembly includes a package substrate, a chip, and a heat dissipation part. The package substrate includes an upper conductive layer, a lower conductive layer, and a conductive part connected between the upper conductive layer and the lower conductive layer. The chip includes a front electrode and a back electrode that are disposed opposite each other, the chip is embedded in the package substrate, the conductive part surrounds the chip, the front electrode is connected to the lower conductive layer, and the back electrode is connected to the upper conductive layer. The heat dissipation part is connected to a surface of the upper conductive layer that is away from the chip. The upper conductive layer, the lower conductive layer, and the conductive part each conduct heat.

    PACKAGE STRUCTURE AND PACKAGE SYSTEM

    公开(公告)号:US20230018603A1

    公开(公告)日:2023-01-19

    申请号:US17863047

    申请日:2022-07-12

    Abstract: This application discloses a package structure and a package system. The package structure may be used for packaging various types of chips, and is coupled to a PCB, so as to form the package system. The package structure includes a package base layer, a chip, a package body, and a connecting assembly. The package base layer has a first surface and a second surface that are opposite to each other. The chip is coupled to the first surface, and there is a chip pad on a surface that is of the chip and that is away from the package base layer. The package body covers the package base layer and the chip to protect the structure, and the chip pad is wired to a surface of the package body through the connecting assembly.

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