METHOD AND APPARATUS FOR ENCODING AND DECODING OF VARIABLE LENGTH QUASI-CYCLIC LOW-DENSITY PARITY-CHECK, QC-LDPC, CODES

    公开(公告)号:US20190268021A1

    公开(公告)日:2019-08-29

    申请号:US16411268

    申请日:2019-05-14

    Abstract: A method for quasi-cyclic low-density parity-check (QC-LDPC) encoding and decoding of a data packet by a lifted matrix is provided, the method comprising: lifting the QC-LDPC code for maximal code length Nmax and maximal circulant size Zupper of the base matrix; generating a plurality of optimal values ri for a plurality of circulants Z1, Z2, . . . , Zupper based on the QC-LDPC code lifted for maximal length Nmax, 0≤ri≤Zupper−1; saving the generated plurality of optimal values ri corresponding to the plurality of circulants Z1, Z2, . . . , Zupper and a matrix for the QC-LDPC code lifted for maximal length Nmax in the memory; receiving a current circulant Zcurrent from the plurality of circulants Z1, Z2, . . . , Zupper; selecting a current optimal value rcurrent from the plurality of optimal values ri stored in the memory corresponding to the current circulant Zcurrent; and lifting the base matrix based on the current optimal value rcurrent.

    GENERATION OF SPATIALLY-COUPLED QUASI-CYCLIC LDPC CODES

    公开(公告)号:US20190273511A1

    公开(公告)日:2019-09-05

    申请号:US16417812

    申请日:2019-05-21

    Abstract: The invention relates to an apparatus for providing at least one parity check matrix defining a spatially-coupled low density parity check, LDPC, code on the basis of a set of base matrix parameters defining a plurality of base matrices, each base matrix of the plurality of base matrices being associated with a protograph of a plurality of protographs, wherein the apparatus comprises: a processor configured to: generate on the basis of the plurality of protographs a set of candidate protographs by discarding protographs of the plurality of protographs; lift the protographs of the set of candidate protographs for generating a plurality of codes; and generate on the basis of a plurality of codes a set of candidate codes by discarding codes of the plurality of codes.

    DEVICES AND METHODS IMPLEMENTING POLAR CODES

    公开(公告)号:US20190081731A1

    公开(公告)日:2019-03-14

    申请号:US16185375

    申请日:2018-11-09

    Abstract: The disclosure relates to devices and methods implementing polar codes. For instance, the disclosure relates to an an encoder for encoding data, wherein the encoder comprises a processor configured to encode the data using a (n, k, d) parent polar code C into codewords c0n-1=u0n-1A subject to the constraints u0n-1VT=0, wherein u0n-1 denotes the data, wherein A = ( 1 0 1 1 ) ⊗ m , wherein F⊗m denotes the m-times Kronecker product of the matrix F with itself and wherein the constraint matrix V comprises in addition to the constraint matrix V0 of the parent polar code the constraint matrix V1 of a first helper code C1 and the constraint matrix V2 of a second helper code C2.

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