Instruction Writing Method and Apparatus, and Network Device

    公开(公告)号:US20220308868A1

    公开(公告)日:2022-09-29

    申请号:US17840326

    申请日:2022-06-14

    Abstract: An instruction writing method, apparatus, and network device are provided to reduce a requirement for a storage space of a microcode processor. The method includes obtaining, by a first device, first indication information, where the first indication information indicates the first device to enable a first service function, and writing, by the first device, a first microcode instruction set corresponding to the first service function into an unused storage space of a target microcode processor in a network processor, where a size of the unused storage space is greater than or equal to a size of the first microcode instruction set.

    PARSING COMPONENT, PACKET PARSING METHOD, FORWARDING CHIP, AND NETWORK DEVICE

    公开(公告)号:US20230135519A1

    公开(公告)日:2023-05-04

    申请号:US17976641

    申请日:2022-10-28

    Abstract: A parsing component includes m parsing units. At least one parsing unit in them parsing units includes a fixed parsing module and a configurable parsing module. The fixed parsing module stores fixed protocol content. The configurable parsing module is configured to configure protocol content in the configurable parsing module based on obtained content configuration information. Each parsing module in the fixed parsing module and the configurable parsing module is configured to parse a packet based on the protocol content in the parsing module. A target parsing unit is configured to separately parse, by using a fixed parsing module in the target parsing unit and a configurable parsing module in the target parsing unit, a packet input into the target parsing unit. This application helps improve parsing efficiency of the parsing component.

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