公开(公告)号：US20240119114A1

公开(公告)日：2024-04-11

申请号：US18494455

申请日：2023-10-25

Applicant: Huawei Technologies Co., Ltd.

Inventor： Chun Hang Lee ,  Mingke Li ,  Yidong Zhang

IPC: G06F17/16

CPC classification number: G06F17/16

Abstract: A matrix multiplier includes an operation circuit and a controller. The operation circuit is coupled to the controller. The controller is configured to control the operation circuit to reuse a left fractal matrix Asr in n consecutive clock cycles, and control the operation circuit to use a right fractal matrix Brt in n right fractal matrices in each of the n consecutive clock cycles. The operation circuit is configured to multiply, in each of the n consecutive clock cycles, the left fractal matrix by the right fractal matrix in the n right fractal matrices to obtain n matrix operation results.