公开(公告)号：US20150156007A1

公开(公告)日：2015-06-04

申请号：US14555067

申请日：2014-11-26

Applicant: Huawei Technologies Co., Ltd.

Inventor： Shuangwu XU ,  Tianxin WANG ,  Yongjie SHI

IPC: H04L7/00

CPC classification number: H04L49/40

Abstract: The present invention discloses a link adjusting method and apparatus, where the method includes: increasing or reducing, by a first chip, a link between the first chip and a second chip; acquiring, by the first chip, an unchanged link between the first chip and the second chip; sending, by the first chip, an adjustment request message to the second chip, and sending, to the second chip, service data between the first chip and the second chip by using the unchanged link, so that the second chip synchronizes and aligns the link between the first chip and the second chip, and the second chip executes a service between the first chip and the second chip. The apparatus includes: an adjusting module, an acquiring module, and a sending module. The present invention may adjust a link under a circumstance that service data transmission between chips is not interrupted.

Abstract translation: 本发明公开了一种链路调整方法和装置，其中，该方法包括：通过第一芯片增加或减少第一芯片与第二芯片之间的链路; 通过第一芯片获取第一芯片和第二芯片之间的未变链接; 通过第一芯片向第二芯片发送调整请求消息，并通过使用未改变的链路向第二芯片发送第一芯片和第二芯片之间的服务数据，使得第二芯片同步并对准链路 在第一芯片和第二芯片之间，并且第二芯片在第一芯片和第二芯片之间执行服务。 该装置包括：调整模块，采集模块和发送模块。 本发明可以在不中断芯片之间的业务数据传输的情况下调整链路。

公开(公告)号：US20140044138A1

公开(公告)日：2014-02-13

申请号：US13961423

申请日：2013-08-07

Applicant: Huawei Technologies Co., Ltd.

Inventor： Yongjie SHI ,  Tao LIN ,  Shuangwu XU ,  Yanxi ZHANG

IPC: H04J3/06

CPC classification number: H04J3/0605 ,  H04L7/10 ,  H04L25/14

Abstract: A receiving-side chip is disclosed according to the present invention, which includes a processor, configured to acquire and execute following instructions: receiving link information sent by a sending-side chip, and enabling, according to the link information, a SerDes link to be added; receiving padding data from the added SerDes link according to a short unit frame period to acquire a synchronization word, and determining, according to the synchronization word, whether the added SerDes link has been synchronized; switching a read period of data in the added SerDes link from the short unit frame period into a long unit frame period, and aligning the data of the added SerDes link with the data of an original SerDes link; and receiving service data over the added SerDes link and the original SerDes link.

Abstract translation: 根据本发明公开了一种根据本发明的接收侧芯片，其包括：处理器，被配置为获取和执行以下指令：接收由发送侧芯片发送的链路信息，并且根据链路信息使得能够将SerDes链路 被添加 根据短单位帧周期从所添加的SerDes链路接收填充数据以获取同步字，并根据所述同步字确定添加的SerDes链路是否已被同步; 将添加的SerDes链路中的数据的读取周期从短单位帧周期切换到长单位帧周期，并且将所添加的SerDes链路的数据与原始SerDes链路的数据对齐; 并通过添加的SerDes链接和原始SerDes链接接收服务数据。