公开(公告)号：US06828183B1

公开(公告)日：2004-12-07

申请号：US10120834

申请日：2002-04-11

申请人： Hung Cheng Sung ,  Han-Ping Chen ,  Cheng Yuan Hsu

发明人： Hung Cheng Sung ,  Han-Ping Chen ,  Cheng Yuan Hsu

IPC分类号： H01L218238

CPC分类号： H01L27/11526 ,  H01L27/105 ,  H01L27/115 ,  H01L27/11534

摘要： A process for forming a high voltage oxide (HV) and a select gate poly for a split-gate flash memory is disclosed. The general difficulty of forming oxides of two different thicknesses for two different areas on the same substrate is alleviated by forming an HV oxide layer over the entire substrate just prior to the forming of the control gate of a cell area after the forming of a gate oxide layer over the peripheral area of the substrate. At an immediate subsequent step, a peripheral gate is formed over the HV oxide over the peripheral area, and, as a final step, the forming of the control gate, or the select gate of the cell area follows next.

摘要翻译： 公开了一种用于形成用于分闸式闪存的高电压氧化物（HV）和选择栅多晶硅的工艺。 在形成栅极氧化物之后，在形成电池区域的控制栅极之前，通过在整个衬底上形成HV氧化物层来减轻在相同衬底上形成两个不同厚度的两种不同厚度的氧化物的一般困难 层在衬底的周边区域上。 在紧随其后的步骤中，外围栅极形成在外围区域上的HV氧化物上，并且作为最后的步骤，接下来将形成控制栅极或单元区域的选择栅极。