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    Sense, store and interlock matrix circuit for a switching device
    3.
    发明授权
    Sense, store and interlock matrix circuit for a switching device 失效
    用于切换设备的感知，存储和互锁矩阵电路

    公开(公告)号：US3582892A

    公开(公告)日：1971-06-01

    申请号：US3582892D

    申请日：1968-10-29

    Applicant: IBM

    Inventor： JULIUSBURGER HANS Y ,  STILWELL GEORGE R JR

    IPC: G06K15/10 ,  H03M11/02 ,  H04Q3/00

    CPC classification number: H03M11/02 ,  G06K15/10

    Abstract: A circuit is provided which operates in combination with a matrix switch. The circuit senses a switch closure, stores a pair of output signals representative of the closed switch, cancels the effect of a second switch closure or multiple switch closure during the storage period and resets at the end of the storage period. The circuit includes a plurality of transistor latching means connected to the matrix switch, pairs of which are set by switch closures. Clamping diodes are provided to balance the latching means to prevent spontaneous setting. A switch interlock transistor is included to prevent any subsequent switch closures prior to reset from producing an output signal. A transistor arrangement is also included to cancel the output signals when two or more switches are erroneously closed at the same time. At the end of a selected time period, reset transistors are actuated to reset the circuit to its original state.

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