公开(公告)号：US3568153A

公开(公告)日：1971-03-02

申请号：US3568153D

申请日：1968-09-16

Applicant: IBM

Inventor： KURTZ GERALD W ,  PATTIN AUGUST K JR

IPC: G06F11/10 ,  G11C29/00 ,  G06F11/12

CPC classification number: G06F11/1008

Abstract: This invention relates to a memory for a data processing system in which the data stored in the memory is encoded to form check bits that permit identifying and correcting an error in a word of data read from the memory. The specification teaches improved circuits for changing the check bits to agree with a corrected word after an error has been detected and corrected.

公开(公告)号：US3573728A

公开(公告)日：1971-04-06

申请号：US3573728D

申请日：1969-01-09

Applicant: IBM

Inventor： KOLANKOWSKY EUGENE ,  PATTIN AUGUST K JR

IPC: G06F11/10 ,  H04L1/10 ,  H04B3/46

CPC classification number: G06F11/1056

Abstract: This invention provides coding circuits for storing words in a memory in an error correction code and for operating with an associated system in which data is provided with error detecting parity check bits. The coding circuits include means for locating an incorrect bit of a memory word and for updating the error correction bits to correspond to the corrected word.