公开(公告)号：US20230262996A1

公开(公告)日：2023-08-17

申请号：US18169761

申请日：2023-02-15

Applicant: IMEC VZW

Inventor： Maarten Rosmeulen ,  Jiwon Lee ,  Gouri Sankar Kar ,  Swaraj Bandhu Mahato

IPC: H10B99/00

CPC classification number: H10B99/22

Abstract: A charge-coupled device (CCD) memory is provided. In one aspect, the CCD memory is 3D integrated. The CCD memory can include a gate stack with a plurality of gate layers and spacer layers alternatingly arranged one on the other, and a plurality of semiconductor-based channels extending in the stack. The channels may be formed from a semiconductor oxide material. The CCD memory can include dielectric layers, wherein each dielectric layer is arranged between one of the channels and at least one of the gate layers. Each channel of the CCD memory can form, in combination with the gate layers and at least one of the dielectric layers, a string of charge storage capacitors, and each string of charge storage capacitors can be operable as a CCD register. The CCD memory can also include a readout layer, which can include a plurality of readout stages configured to individually readout stored charge from each of the CCD registers.