Abstract:
A device for time delay and integration imaging comprises: an array of pixels being arranged in rows and columns extending in a first and second direction, respectively. Pixels may accumulate generated charges in response to received electro-magnetic radiation along each column. The rows comprise at least one lateral charge shifting row to selectively shift accumulated charges in a column to an adjacent column and a controller configured to receive at least two angle correction input values. Each angle correction input value is based on a received intensity of electro-magnetic radiation on a measurement line, wherein the at least two angle correction input values are acquired by measurement lines extending in directions defining different angles in relation to the second direction, wherein the controller is configured to, based on the received at least two angle correction input values, control activation of the at least one lateral charge shifting row.
Abstract:
The present disclosure relates to a method that includes forming a layer stack over a substrate; forming first recessed areas in a sidewall surrounding a memory hole in the layer stack by laterally etching back inter-gate spacer layers of the layer stack; forming sacrificial layers in the first recessed areas; forming second recessed areas in the sidewall by laterally etching back gate layers of the layer stack; forming a lateral memory stack in each second recessed area by selectively depositing, in the second recessed areas, a blocking oxide and, subsequently, a charge trap material. The method further includes removing the sacrificial layers by etching from the memory hole; re-growing the inter-gate spacer layers such that the lateral memory stacks are vertically separated by the re-grown inter-gate spacer layers; forming a tunneling oxide layer in the memory hole; and forming a channel layer along the tunneling oxide layer.
Abstract:
Example embodiments relate to matrix-vector multiplications based on charge-summing memory cell strings. An example in-memory compute device for performing analog multiply-and-accumulate operations on a set of data inputs and a set of weight inputs includes a string of serially connected memory cells formed over a semiconductor channel structure, a source junction controllably connectible to one end of the string of memory cells via a string select switch, a readout circuit including a sense node controllably connectible to one end of the string of memory cells via a charge transfer switch, and control circuitry. The control circuitry is configured to apply pass mode signals, data input signals, and stop signals sequentially according to each memory cell's position along a string. The control circuitry is also configured to enable the string select switch and the charge transfer switch.
Abstract:
A memory device including at least one channel and a fluid including particles is provided. In one aspect, the channel includes a least some of the fluid. The memory device may further include an actuator configured to induce a movement of the particles in the channel; and a writing element configured to arrange the particles in a sequence, thereby yielding a sequence of particles in the channel. The particles may include first particles and second particles. The particles may be in a first state or a second state in the channel. In certain aspects, the channel is configured to preserve the sequence of the particles. The memory device may further include a reading element for detecting the sequence of the particles in the channel.
Abstract:
A storage device configured to store data on a tape is provided. In one aspect, the storage device includes the tape, which is configured to store data, and a data head, which is configured to read and/or write data from and/or to the tape. The storage device further includes an actuator configured to move the tape in a length direction in a step-wise manner. The actuator can include a plurality of pulling electrodes, wherein each pulling electrode can be activated to exert a pulling force on the tape, and a plurality of clamping electrodes, wherein each clamping electrode can be activated to clamp the tape.
Abstract:
The disclosed technology presents a device and a method, respectively, for generating an augmented reality (AR) image (or AR video). The device configures to obtain a first image of a scene, obtain a second image of an object, obtain a depth range, and capture a third image of only the parts of the scene inside the depth range. Further, the device configures to generate occlusion information based on the third image, and overlay the first image and the second image based on the occlusion information to generate the AR image.
Abstract:
An optical device and a method for fabricating an optical device are described. The optical device may be a light emitting diode (LED) device, e.g. a micro-LED (μLED) device, or a photodiode (PD) device, e.g. an imager. The method comprises processing, on a first semiconductor wafer, an array including a plurality of compound semiconductor LEDs or compound semiconductor PDs and a plurality of first contacts, each first contact being electrically connected to one of the LEDs or PDs. The method further comprises processing, on a second semiconductor wafer, a CMOS IC and a plurality of second contacts electrically connected to the CMOS IC. The method further comprises hybrid bonding the first semiconductor wafer to the second semiconductor wafer such that the plurality of LEDs or PDs are individually connected to the CMOS IC via the first and second contacts.
Abstract:
A pixel architecture comprises: an absorption layer, which is configured to generate charges in response to incident light; a semiconductor charge-transport layer, which is configured to transport the generated charges through the charge-transport layer, wherein one or more doped regions are arranged in the charge-transport layer, wherein the charge-transport layer comprises a bias region and a charge-dispatch region being associated with the bias region; an electric connection connecting to and providing a selectable bias voltage to the bias region; and at least one transfer gate, wherein the doped regions and the bias region are differently biased for driving transport of the generated charges towards the charge-dispatch region, and for controlling, together with the at least one transfer gate, transfer of charges from the charge-dispatch region to a charge node.
Abstract:
An optical device and a method for fabricating an optical device are described. The optical device may be a light emitting diode (LED) device, e.g. a micro-LED (μLED) device, or a photodiode (PD) device, e.g. an imager. The method comprises processing, on a first semiconductor wafer, an array including a plurality of compound semiconductor LEDs or compound semiconductor PDs and a plurality of first contacts, each first contact being electrically connected to one of the LEDs or PDs. The method further comprises processing, on a second semiconductor wafer, a CMOS IC and a plurality of second contacts electrically connected to the CMOS IC. The method further comprises hybrid bonding the first semiconductor wafer to the second semiconductor wafer such that the plurality of LEDs or PDs are individually connected to the CMOS IC via the first and second contacts.
Abstract:
A device for imaging comprising an image sensor is disclosed. The image sensor includes rows and columns of pixels. The image sensor further includes a first control structure for controlling transfer of accumulated electric charges from photo-active regions to transmission regions in pixels. The image sensor further includes a second control structure for controlling transfer of accumulated charge in the transmission region of each row to the adjacent row below. The first and second control structures control the image sensor to alternately transfer accumulated charges in photo-active regions to the transmission regions and transfer charges to the adjacent row below. The control structure includes a plurality of row structures which are arranged to select whether the charge in the photo-active regions of respective rows are added to the transmission region. Each row of pixels is controlled by one of the row structures of the first control structure.