公开(公告)号：US20250031408A1

公开(公告)日：2025-01-23

申请号：US18401842

申请日：2024-01-02

Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE

Inventor： Chih-Hung YEN ,  Hua-Mao CHEN ,  Yu-Ting CHEN

IPC: H01L29/78 ,  H01L29/06 ,  H01L29/423

Abstract: A power semiconductor device includes a semiconductor substrate, a drift layer, a well region, a doped region, two dummy trenches, a gate structure and a dielectric layer. The semiconductor substrate is doped to have a first conductive channel. The drift layer on the semiconductor substrate is doped to have the first conductive channel. The well region on the drift layer is doped to have a second conductive channel having a polarity opposite to that of the first conductive channel. The doped region on the well region is doped to have the first conductive channel. Two dummy trenches pass through the doped region and the well region. Each of the dummy trenches has a dummy gate. The gate structure has a real gate and is between the dummy trenches. The dielectric layer isolates the dummy gate and the real gate from the doped region, the well region and the drift layer.