公开(公告)号：US20240289327A1

公开(公告)日：2024-08-29

申请号：US18587412

申请日：2024-02-26

Applicant: INFOSYS LIMITED

Inventor： Steven SCHILDERS

IPC: G06F16/2452 ,  G06F16/215

CPC classification number: G06F16/24526 ,  G06F16/215

Abstract: An overlay system is provided that includes a storage element and processing circuitry coupled thereto. The storage element stores an executable graph-based model including a plurality of nodes, a plurality of rule overlay nodes, and a plurality of data analysis overlay nodes. The processing circuitry receives a stimulus indicative of a data analysis operation and identifies a first node, a rule overlay node associated with the first node, and a data analysis overlay node associated with the first node. The processing circuitry executes a set of rules associated with the rule overlay node on a composition of the first node to generate a set of outputs. The data analysis overlay node uses the set of outputs to determine whether a data analysis score associated with the first node exceeds a data analysis score threshold.

公开(公告)号：US20240256602A1

公开(公告)日：2024-08-01

申请号：US18121149

申请日：2023-03-14

Applicant: INFOSYS LIMITED

Inventor： Steven SCHILDERS

IPC: G06F16/901

CPC classification number: G06F16/9024

Abstract: A system comprises an executable graph-based model. The executable graph-based model comprises a first overlay node. The first overlay node comprises processing logic that is operable to interact with one or more associated nodes of the executable graph-based model. Further, the executable graph-based model comprises a first node that has the first overlay node associated therewith. The system further comprises a processing unit configured to receive a first stimulus associated with the first overlay node and, in response to the first stimulus being received, cause execution of said processing logic of the first overlay node. Execution of said processing logic of the first overlay node is based on the first node.

公开(公告)号：US20240330370A1

公开(公告)日：2024-10-03

申请号：US18440527

申请日：2024-02-13

Applicant: INFOSYS LIMITED

Inventor： Steven SCHILDERS ,  Kaustubh KISHOR MADKE

IPC: G06F16/903 ,  G06F16/901 ,  G06F21/60

CPC classification number: G06F16/90335 ,  G06F16/9024 ,  G06F21/602

Abstract: A system for executing a search in a dataset is provided. The system includes a storage element that stores a directed property graph derived from the dataset. The directed property graph includes entity vertices corresponding to entities of the dataset, edges corresponding to properties of the entities, and value vertices corresponding to data values of the properties. Each edge couples an entity vertex to a value vertex and includes a label indicating an association therebetween. The system further includes processing circuitry that receives a search query including a reference value. The processing circuitry identifies a value vertex having a data value that is associated with the reference value and generates a response to the search query based on labels of edges coupled to the value vertex, and entities of the dataset represented by entity vertices coupled to the value vertex by way of the edges.

公开(公告)号：US20240289483A1

公开(公告)日：2024-08-29

申请号：US18589032

申请日：2024-02-27

Applicant: INFOSYS LIMITED

Inventor： Steven SCHILDERS

IPC: G06F21/62 ,  G06F16/901

CPC classification number: G06F21/6227 ,  G06F16/9024

Abstract: An overlay system is provided that includes a primary storage element, a plurality of auxiliary storage elements, and processing circuitry. The primary storage element stores an executable graph-based model having a plurality of nodes. The processing circuitry receives a first stimulus indicative of a data splintering instruction. Based on the first stimulus, the processing circuitry identifies a first node in the executable graph-based model and executes a data splintering operation on the first node to divide the first node into a plurality of splinters. The processing circuitry, based on the first stimulus, instantiates a plurality of location overlay nodes and associates the plurality of location overlay nodes with the plurality of splinters. Based on the association, the processing circuitry stores each splinter of the plurality of splinters in an auxiliary storage element indicated by a corresponding location overlay node.

公开(公告)号：US20240256607A1

公开(公告)日：2024-08-01

申请号：US18229607

申请日：2023-08-02

Applicant: INFOSYS LIMITED

Inventor： Steven SCHILDERS

IPC: G06F16/901

CPC classification number: G06F16/9024

Abstract: A method discloses obtaining a node template comprising a predetermined node structure and rules governing generation of node instances based on the node template. Data elements are received. A run-time node is generated in response to the reception of the data elements. The run-time node comprises the node template and a node instance. The node instance comprises the data elements mapped to the node template based on the rules of the node template. A run-time overlay comprising an overlay template and an overlay instance comprising processing logic implementing at least one generic rule of the overlay template are obtained. The executable run-time node is generated. It comprises a composition of the run-time node and the run-time overlay such that the processing logic of the run-time overlay is operable to interact with the run time node during execution of the executable run-time node.

公开(公告)号：US20240296185A1

公开(公告)日：2024-09-05

申请号：US18587446

申请日：2024-02-26

Applicant: INFOSYS LIMITED

Inventor： Steven SCHILDERS

IPC: G06F16/901

CPC classification number: G06F16/9024

Abstract: An overlay system is provided that includes a storage element and processing circuitry. The storage element stores an executable graph-based model that includes various executable nodes that communicate with each other by way of messages. The executable graph-based model further includes a message node for each message associated with the overlay system. Each message node is associated with one or more time-series analytics overlay nodes that execute a corresponding set of time-series computation functions on the corresponding message node. A publisher overlay node associated with each time-series analytics overlay node may generate and publish a statistical insight based on an output of each corresponding time-series computation function. The processing circuitry may use the statistical insight to generate an analytics outcome.

公开(公告)号：US20240289587A1

公开(公告)日：2024-08-29

申请号：US18589182

申请日：2024-02-27

Applicant: INFOSYS LIMITED

Inventor： Steven SCHILDERS

IPC: G06N3/042

CPC classification number: G06N3/042

Abstract: An artificial neural network (ANN) modelled as an overlay hypergraph comprising a plurality of hyperedges, a plurality of role nodes, and one or more overlay nodes. A hyperedge of the plurality of hyperedges represents an artificial neuron within the ANN and comprises a set of role nodes each of which representing a portion of a connective relationship within the ANN. A role node of the plurality of role nodes represents a connection between layers of the ANN and comprises a first connective relationship associated with a first hyperedge and a second connective relationship associated with a second hyperedge such that the role node functionally connects the first hyperedge and the second hyperedge. The one or more overlay nodes comprise processing logic operable to interact with at least one hyperedge or at least one role node coupled to the one or more overlay nodes.

公开(公告)号：US20240256603A1

公开(公告)日：2024-08-01

申请号：US18125540

申请日：2023-03-23

Applicant: INFOSYS LIMITED

Inventor： Steven SCHILDERS

IPC: G06F16/901

CPC classification number: G06F16/9024 ,  G06F16/9027

Abstract: A method for dynamic execution of sub-graphs within executable graph-based models is provided. Processing circuitry obtains an executable graph-based model comprising a plurality of sub-graphs and an overlay structure comprising processing logic associated with the plurality of sub-graphs. Each sub-graph defines a hierarchical structure of related nodes. The processing circuitry receives a stimulus and a context associated with the stimulus. In response to the stimulus being received and based on the context, the processing circuitry maps the stimulus to a first sub-graph of the executable graph-based model. The processing circuitry causes execution of processing logic within the overlay structure based on the mapping. The processing logic is associated with one or more nodes of the first sub-graph.

公开(公告)号：US20240289653A1

公开(公告)日：2024-08-29

申请号：US18589035

申请日：2024-02-27

Applicant: INFOSYS LIMITED

Inventor： Steven SCHILDERS

IPC: G06N5/04 ,  G06N5/025

CPC classification number: G06N5/04 ,  G06N5/025

Abstract: An executable inference hypergraph representing a rule-based model, the executable inference hypergraph comprising a first hyperedge associated with a first inference rule of the rule-based model and encapsulating a plurality of value nodes storing a plurality of values such that the plurality of values form a part of a set of terms used to evaluate the first inference rule, wherein the plurality of value nodes include at least one of the one or more value nodes of a graph-based model. The executable inference hypergraph further comprising a rule overlay node coupled to the first hyperedge thereby forming a first executable inference rule, wherein the rule overlay node comprises processing logic operable to evaluate the first inference rule using the set of terms encapsulated by the first hyperedge. The executable inference hypergraph is executed to determine an inference outcome.

公开(公告)号：US20240289391A1

公开(公告)日：2024-08-29

申请号：US18585554

申请日：2024-02-23

Applicant: INFOSYS LIMITED

Inventor： Steven SCHILDERS

IPC: G06F16/901 ,  G06F16/908

CPC classification number: G06F16/9024 ,  G06F16/908

Abstract: An overlay system provided, includes processing circuitry and storage circuitry that stores primary executable graph-based models and auxiliary executable graph-based models. Each primary executable graph-based model is mapped to one or more auxiliary executable graph-based models based on various rules. The processing circuitry receives a stimulus associated with the overlay system and identifies, based on the stimulus, a primary executable graph-based model and one or more rules. Further, one or more values associated with an auxiliary executable graph-based model that is mapped to the primary executable graph-based model are retrieved based on the one or more rules. One or more values associated with the primary executable graph-based model are populated based on the retrieved one or more values. The processing circuitry further executes an operation associated with the stimulus based on the primary executable graph-based model that is populated with the one or more values.