公开(公告)号：US20190190748A1

公开(公告)日：2019-06-20

申请号：US16212169

申请日：2018-12-06

Applicant: INPHI CORPORATION

Inventor： Karim ABDELHALIM ,  Michael LE ,  Haidang LIN

IPC: H04L25/03 ,  H03K19/00

CPC classification number: H04L25/0328 ,  H03K19/0008 ,  H04L2025/03541 ,  H04L2025/03777

Abstract: The present invention relates to data communication techniques and integrated circuit devices. More specifically, embodiments of the present invention provide an input buffer module that utilizes one or more equalization elements. The input buffer module includes an array of inverters arranged in a series. An equalization element is configured in series relative to a segment of the array of inverters. The resistance value of the equalization element is predetermined based on a delay associated with the segment of the array of inverters. There are other embodiments as well.