公开(公告)号：US20160012919A1

公开(公告)日：2016-01-14

申请号：US14769648

申请日：2014-02-18

申请人： INSIDE SECURE

发明人： Salwa BOUZEKRI ALAMI

IPC分类号： G11C29/50 ,  G11C7/00

CPC分类号： G11C29/50 ,  G11C7/00 ,  G11C7/24 ,  G11C8/20 ,  G11C11/4078 ,  G11C16/22 ,  G11C29/08 ,  G11C2029/5004

摘要： A memory including at least one line to which memory cells are coupled. A control circuit is configured to emit an end-of-operation signal at the end of the execution of an operation on at least one memory cell, and a glitch detection circuit coupled to the memory line is configured to supply a glitch detection signal when a falling edge of the amplitude of a voltage signal appears on the memory line in the absence of the end-of-operation signal.

摘要翻译： 存储器，其包括与存储器单元耦合到的至少一行。 控制电路被配置为在对至少一个存储单元执行操作结束时发射操作结束信号，并且耦合到存储器线的毛刺检测电路被配置为当 在没有操作结束信号的情况下，电压信号幅度的下降沿出现在存储线上。