公开(公告)号：US10755984B2

公开(公告)日：2020-08-25

申请号：US15576396

申请日：2015-06-24

Applicant: INTEL CORPORATION

Inventor： Glenn A. Glass ,  Ying Pang ,  Nabil G. Mistkawi ,  Anand S. Murthy ,  Tahir Ghani ,  Huang-Lin Chao

IPC: H01L21/8238 ,  H01L21/02 ,  H01L21/8234 ,  H01L27/092 ,  H01L29/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/161 ,  H01L29/20 ,  H01L29/66

Abstract: Techniques are disclosed for customization of fin-based transistor devices to provide a diverse range of channel configurations and/or material systems, and within the same integrated circuit die. Sacrificial fins are removed via wet and/or dry etch chemistries configured to provide trench bottoms that are non-faceted and have no or otherwise low-ion damage. The trench is then filled with desired semiconductor material. A trench bottom having low-ion damage and non-faceted morphology encourages a defect-free or low defect interface between the substrate and the replacement material. In an embodiment, each of a first set of the sacrificial silicon fins is recessed and replaced with a p-type material, and each of a second set of the sacrificial fins is recessed and replaced with an n-type material. Another embodiment may include a combination of native fins (e.g., Si) and replacement fins (e.g., SiGe). Another embodiment may include replacement fins all of the same configuration.