公开(公告)号：US20180286804A1

公开(公告)日：2018-10-04

申请号：US15476905

申请日：2017-03-31

Applicant: INTEL CORPORATION

Inventor： SEOK LING LIM ,  ENG HUAT GOH ,  HOAY TIEN TEOH ,  JENNY SHIO YIN ONG ,  JIA YAN GO ,  JIUN HANN SIR ,  MIN SUET LIM

IPC: H01L23/522 ,  H01L23/528

CPC classification number: H01L23/5223 ,  H01L23/043 ,  H01L23/49816 ,  H01L23/49827 ,  H01L23/5222 ,  H01L23/5286 ,  H01L2225/06548 ,  H01L2225/1047

Abstract: Interconnects for semiconductor packages are described. An apparatus may comprise a decoupling capacitor on a logic board, and a conductive interconnect element on the logic board, the conductive interconnect element to connect the decoupling capacitor on the logic board to a power conductor comprising a power pad of a semiconductor package, the conductive interconnect element at a different layer than a ground-potential layer of the logic board. Other embodiments are described and claimed.