公开(公告)号：US20200219772A1

公开(公告)日：2020-07-09

申请号：US16239059

申请日：2019-01-03

Applicant: INTEL CORPORATION

Inventor： RAHUL RAMASWAMY ,  NIDHI NIDHI ,  WALID M. HAFEZ ,  JOHANN C. RODE ,  PAUL FISCHER ,  HAN WUI THEN ,  MARKO RADOSAVLJEVIC ,  SANSAPTAK DASGUPTA

IPC: H01L21/8252 ,  H01L27/06 ,  H01L29/20 ,  H01L29/205 ,  H01L29/778 ,  H01L29/872 ,  H01L29/66

Abstract: An integrated circuit structure and methodologies of forming same. In an embodiment, the integrated circuit structure includes a transistor gate structure in a first region of semiconductor material and a diode in a second region of the semiconductor material. The gate structure has a gate electrode of conductive material with a liner along sides and a bottom of the gate electrode. The gate electrode has a gate length less than a threshold dimension value. The diode includes a body of the conductive material in contact with the semiconductor material and includes the liner along sides of the body of conductive material. The body of conductive material has a lateral dimension greater than the threshold dimension value. The liner can include, for example, a gate dielectric and a diffusion barrier in some embodiments. In other embodiments, the liner is the gate dielectric (without any diffusion barrier).