公开(公告)号：US20190044259A1

公开(公告)日：2019-02-07

申请号：US15807519

申请日：2017-11-08

Applicant: INTEL CORPORATION

Inventor： JAWAD B. KHAN ,  JORGE ULISES MARTINEZ ARAIZA ,  MICHAEL D. NELSON

IPC: H01R12/70 ,  H01R12/72 ,  H01R13/26 ,  H01R43/20 ,  H05K7/14

Abstract: Embodiments of the present disclosure are directed towards a connector for a memory device in a computing system. In one embodiment, the connector may include a housing having a cavity to receive a mating end of a printed circuit board (PCB). The cavity may include first groups of first contacts arranged along an inside wall of the cavity, to engage with respective second groups of second contacts arranged around the mating end of the PCB. The cavity may further include a bar disposed inside the cavity to bridge the cavity, to receive a notch formed on the mating end of the PCB. A depth of the notch may define a number of the first groups of first contacts to be engaged with a respective number of the second groups of second contacts on the mating end of the PCB. Other embodiments may be described and/or claimed.