公开(公告)号：US20200066651A1

公开(公告)日：2020-02-27

申请号：US16611129

申请日：2017-06-29

Applicant: INTEL CORPORATION

Inventor： Edward A. Burton ,  Mark T. Bohr ,  Murray Fitzpatrick Kelley ,  Shawn Michael Klauser

IPC: H01L23/544 ,  H01L23/538 ,  G03F7/20

Abstract: Techniques are described for fabricating integrated circuit devices that span multiple reticle fields. Integrated circuits formed within separate reticle fields are placed into electrical contact with each other by overlapping reticle fields to form an overlapping conductive interconnect. This overlapping conductive interconnect electrically connects an interconnect layer of a first reticle field with an interconnect layer of a second, laterally adjacent reticle field. The overlapping conductive interconnection extends into a common scribe zone between adjacent reticle fields.

公开(公告)号：US11043459B2

公开(公告)日：2021-06-22

申请号：US16611129

申请日：2017-06-29

Applicant: INTEL CORPORATION

Inventor： Edward A. Burton ,  Mark T. Bohr ,  Murray Fitzpatrick Kelley ,  Shawn Michael Klauser

IPC: H01L23/544 ,  H01L23/538 ,  G03F7/20

Abstract: Techniques are described for fabricating integrated circuit devices that span multiple reticle fields. Integrated circuits formed within separate reticle fields are placed into electrical contact with each other by overlapping reticle fields to form an overlapping conductive interconnect. This overlapping conductive interconnect electrically connects an interconnect layer of a first reticle field with an interconnect layer of a second, laterally adjacent reticle field. The overlapping conductive interconnection extends into a common scribe zone between adjacent reticle fields.