公开(公告)号：US20060280296A1

公开(公告)日：2006-12-14

申请号：US11431552

申请日：2006-05-11

申请人： Ihor Vasyltsov ,  Hee-kwan Son ,  Yoo-jin Baek

发明人： Ihor Vasyltsov ,  Hee-kwan Son ,  Yoo-jin Baek

IPC分类号： H04L9/28

CPC分类号： G06F7/725 ,  G06F2207/7228 ,  H04L9/003 ,  H04L9/3066 ,  H04L2209/08

摘要： A method and system for encrypting input data may include receiving an input point and a randomness rate and generating a random selection value and a random position value from the randomness rate. At least one of the input point and points encrypted by performing elliptic curve (EC) operation over a plurality of rounds may be randomly selected based on the randomness rate and the random position value. The selected point may be converted to a point representation directed by the random selection value. A finally encrypted output point may be generated by performing the EC operation over a plurality of rounds based on the input point and a secret key.

摘要翻译： 用于加密输入数据的方法和系统可以包括接收输入点和随机速率，并从随机率产生随机选择值和随机位置值。 可以基于随机位置值随机选择通过在多个轮次上执行椭圆曲线（EC）操作而加密的输入点和点中的至少一个。 所选点可以被转换成由随机选择值指导的点表示。 可以通过基于输入点和秘密密钥在多个轮次上执行EC操作来生成最终加密的输出点。

公开(公告)号：US07853013B2

公开(公告)日：2010-12-14

申请号：US11431552

申请日：2006-05-11

申请人： Ihor Vasyltsov ,  Hee-kwan Son ,  Yoo-jin Baek

发明人： Ihor Vasyltsov ,  Hee-kwan Son ,  Yoo-jin Baek

IPC分类号： H04L9/28 ,  H04K1/00

CPC分类号： G06F7/725 ,  G06F2207/7228 ,  H04L9/003 ,  H04L9/3066 ,  H04L2209/08

摘要： A method and system for encrypting input data may include receiving an input point and a randomness rate and generating a random selection value and a random position value from the randomness rate. At least one of the input point and points encrypted by performing elliptic curve (EC) operation over a plurality of rounds may be randomly selected based on the randomness rate and the random position value. The selected point may be converted to a point representation directed by the random selection value. A finally encrypted output point may be generated by performing the EC operation over a plurality of rounds based on the input point and a secret key.

摘要翻译： 用于加密输入数据的方法和系统可以包括接收输入点和随机速率，并从随机率产生随机选择值和随机位置值。 可以基于随机位置值随机选择通过在多个轮次上执行椭圆曲线（EC）操作而加密的输入点和点中的至少一个。 所选点可以被转换成由随机选择值指导的点表示。 可以通过基于输入点和秘密密钥在多个轮次上执行EC操作来生成最终加密的输出点。

公开(公告)号：US08495116B2

公开(公告)日：2013-07-23

申请号：US12717249

申请日：2010-03-04

申请人： Yoo-jin Baek

发明人： Yoo-jin Baek

IPC分类号： G06F7/00 ,  G06F15/00

CPC分类号： G06F7/764

摘要： A circuit for converting Boolean and arithmetic masks includes “m” converting units, wherein m is an integer greater than 1. Each of the m converting unit includes; a first converting unit configured to receive first bits of input data, output one of the first bits as a first output bit, perform an XOR operation with respect to at least part of the first bits, and output an XOR operation result as a first intermediate result bit to a next converting unit in a sequence of converting unit ranging between 2 and n−1th; and an nth converting unit, wherein n is an integer greater than or equal to 2 and less than or equal to m, configured to receive n−1th bits and nth bits of the input data, and at least one of an n−1th intermediate result bit and n−1th output bit from an n−1th converting unit, perform an AND operation and the XOR operation with respect to a first group of the received bits, output an operation result for the first group as an nth output bit, perform the AND operation and the XOR operation with respect to a second group of the received bits, and output an operation result of the second group as an nth intermediate result bit.

摘要翻译： 用于转换布尔和算术掩码的电路包括“m”个转换单元，其中m是大于1的整数.m转换单元包括： 第一转换单元，被配置为接收输入数据的第一位，将第一位中的一个作为第一输出位输出，对于至少部分第一位执行异或运算，并输出XOR运算结果作为第一中间 结果位在2和n-1之间的转换单元的序列中的下一个转换单元; 以及第n个转换单元，其中n是大于或等于2并且小于或等于m的整数，被配置为接收输入数据的n-1位和第n位，并且n-1个中间值 从第n-1个转换单元得到结果位和第n-1个输出位，对第一组接收到的比特执行与运算和异或运算，输出第一组的运算结果作为第n个输出位，执行 AND操作和对第二组接收位的异或运算，并将第二组的运算结果输出为第n个中间结果位。

公开(公告)号：US20060120527A1

公开(公告)日：2006-06-08

申请号：US11032544

申请日：2005-01-10

申请人： Yoo-jin Baek

发明人： Yoo-jin Baek

IPC分类号： H04K1/02

CPC分类号： G06F7/724 ,  G06F7/726 ,  G06F21/755 ,  G06F2207/7233 ,  H04L9/003 ,  H04L9/0631 ,  H04L2209/046 ,  H04L2209/127

摘要： An Advanced Encryption System (AES) compliant circuit can include a multiplier circuit configured to multiply masked data with masking data to provide multiplied outputs therefrom and a combinatorial circuit coupled to the multiplier circuit and configured to combine the multiplied outputs with at least one of the masked data or at least one of the masking data.

摘要翻译： 高级加密系统（AES）兼容电路可以包括乘法器电路，其被配置为将掩蔽的数据与掩蔽数据相乘以提供相乘的输出，以及耦合到乘法器电路的组合电路，并且被配置为将乘法输出与至少一个被掩蔽的 数据或至少一个掩蔽数据。