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    SEMICONDUCTOR MEMORY DEVICE
    1.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE 有权
    半导体存储器件

    公开(公告)号：US20140016420A1

    公开(公告)日：2014-01-16

    申请号：US13899949

    申请日：2013-05-22

    申请人： In-chul JEONG

    发明人： In-chul JEONG

    IPC分类号： G11C7/06

    CPC分类号： G11C7/06 ,  G11C5/025 ,  G11C7/18

    摘要： A semiconductor memory device includes a sense amplifier circuit region including first wells disposed in a first direction, a driving circuit region including second wells disposed in a second direction, and a conjunction region disposed at an intersection region of the sense amplifier circuit region and the driving circuit region, a part of each of the first wells extending from the sense amplifier circuit region into the conjunction region, and the second wells being outside of the conjunction region.

    摘要翻译： 一种半导体存储器件，包括读出放大器电路区域，包括沿第一方向布置的第一阱，包括沿第二方向布置的第二阱的驱动电路区域和布置在读出放大器电路区域与驱动 电路区域，每个第一阱的一部分从读出放大器电路区域延伸到连接区域中，第二阱在结合区域之外。

    MEMORY DEVICES AND SYSTEMS INCLUDING ERROR-CORRECTION CODING AND METHODS FOR ERROR-CORRECTION CODING
    2.
    发明申请
    MEMORY DEVICES AND SYSTEMS INCLUDING ERROR-CORRECTION CODING AND METHODS FOR ERROR-CORRECTION CODING 有权
    包含错误修正编码的存储器件和系统以及用于错误校正编码的方法

    公开(公告)号：US20080307285A1

    公开(公告)日：2008-12-11

    申请号：US12132754

    申请日：2008-06-04

    申请人： Kyung-hyun KIM ,  Kwang-il PARK ,  In-chul JEONG

    发明人： Kyung-hyun KIM ,  Kwang-il PARK ,  In-chul JEONG

    IPC分类号： H03M13/03 ,  G06F11/08

    CPC分类号： H04L1/0042

    摘要： In one aspect, a memory device includes a memory cell array, parallel internal data paths which transmit internal data to and from the memory cell array, a data driver which transmits and receives external data, and a data buffer which delays and transfers the external data received by the data driver to the internal data paths, and which delays and transfers the internal data transmitted from the memory cell array to the data driver. The memory device further includes an error correction code generator which generates an error correction code (EC) based on the internal data transmitted on the internal data paths, an EC buffer which delays the error correction code generated by the error correction code generator, an EC driver which transmits the error correction codes delayed by the EC buffer, and a latency controller which variably controls a delay time of at least one of the data buffer and the EC buffer.

    摘要翻译： 一方面，存储器件包括存储单元阵列，将内部数据传送到存储单元阵列和从存储单元阵列发送内部数据的并行内部数据路径，发送和接收外部数据的数据驱动器以及延迟和传送外部数据的数据缓冲器 由数据驱动器接收到内部数据路径，并且延迟并将从存储单元阵列发送的内部数据传送到数据驱动器。 存储装置还包括纠错码发生器，该纠错码产生器基于在内部数据路径上发送的内部数据产生纠错码（EC），延迟由纠错码发生器产生的纠错码的EC缓冲器，EC 发送由EC缓冲器延迟的纠错码的驱动器，以及可变地控制数据缓冲器和EC缓冲器中的至少一个的延迟时间的等待时间控制器。