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公开(公告)号：US20190131508A1
公开(公告)日：2019-05-02
申请号：US16177805
申请日：2018-11-01
Applicant: Infineon Technologies AG
Inventor： Christian Kasztelan , Alexander Breymesser , Manfred Mengel , Andreas Niederhofer
Abstract: A thermoelectric device includes a plurality of first semiconductor mesa structures having a first conductivity type and a plurality of second semiconductor mesa structures having a second conductivity type. First semiconductor mesa structures of the plurality of first semiconductor mesa structures and second semiconductor mesa structures of the plurality of second semiconductor mesa structures are electrically connected in series. The thermoelectric device further includes a glass structure made of at least one of a borosilicate glass, boron-zinc-glass and a low transition temperature glass. The glass structure is arranged laterally between the first semiconductor mesa structures of the plurality of first semiconductor mesa structures and the second semiconductor mesa structures of the plurality of second semiconductor mesa structures. The glass structure electrically insulates the first semiconductor mesa structures of the plurality of first semiconductor mesa structures laterally from the second semiconductor mesa structures of the plurality of second semiconductor mesa structures.
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2.发明申请公开(公告)号：US20180033665A1
公开(公告)日：2018-02-01
申请号：US15662293
申请日：2017-07-28
Applicant: Infineon Technologies AG
Inventor： Andreas Niederhofer , Manfred Mengel , Holger Tamme , Nina Wenger
IPC: H01L21/677 , H01L21/683 , H01L21/673
CPC classification number: H01L21/67769 , H01L21/67303 , H01L21/67346 , H01L21/67386 , H01L21/6773 , H01L21/67772 , H01L21/67781 , H01L21/6836
Abstract: Various embodiments provide a wafer box. The wafer box may include a housing with a receiving space for receiving at least one wafer arranged above a housing base, at least one fixing structure which is connected to the housing base and which extends from the housing base, and at least one fixing device which is fastenable to the at least one fixing structure at a variable distance from the housing base. The fixing device and the fixing structure are designed such that the at least one wafer for arrangement in the receiving space can be fixed in a position by means of the at least one fixing device fastened to the fixing structure.
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Patent Agency Ranking
公开(公告)号：US20180033662A1
公开(公告)日：2018-02-01
申请号：US15662295
申请日：2017-07-28
Applicant: Infineon Technologies AG
Inventor： Nina Wenger , Manfred Mengel , Andreas Niederhofer , Holger Tamme
IPC: H01L21/673
Abstract: In various embodiments, a wafer box is provided. The wafer box may include a housing with a receiving space for receiving a stack comprising a plurality of wafers, each arranged above a housing base. The wafers are to be arranged with their main surfaces parallel to the housing base. The receiving space is delimited by the housing base and side walls arranged thereon. The wafer box may further include at least one base opening, arranged in the housing base, for receiving a guide structure of a wafer stacking aid. The guide structure is to be arranged in such a way that, on a side of the housing base on which the side walls are arranged, it extends out of the housing base in order to limit tilting of a wafer raised or lowered in the receiving space in a manner guided by the guide structure.
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公开(公告)号：US10546767B2
公开(公告)日：2020-01-28
申请号：US15662295
申请日：2017-07-28
Applicant: Infineon Technologies AG
Inventor： Nina Wenger , Manfred Mengel , Andreas Niederhofer , Holger Tamme
IPC: H01L21/673
Abstract: In various embodiments, a wafer box is provided. The wafer box may include a housing with a receiving space for receiving a stack comprising a plurality of wafers, each arranged above a housing base. The wafers are to be arranged with their main surfaces parallel to the housing base. The receiving space is delimited by the housing base and side walls arranged thereon. The wafer box may further include at least one base opening, arranged in the housing base, for receiving a guide structure of a wafer stacking aid. The guide structure is to be arranged in such a way that, on a side of the housing base on which the side walls are arranged, it extends out of the housing base in order to limit tilting of a wafer raised or lowered in the receiving space in a manner guided by the guide structure.
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公开(公告)号：US11641779B2
公开(公告)日：2023-05-02
申请号：US17208495
申请日：2021-03-22
Applicant: Infineon Technologies AG
Inventor： Christian Kasztelan , Alexander Breymesser , Manfred Mengel , Andreas Niederhofer
Abstract: A method includes forming a plurality of first semiconductor mesa structures at a first semiconductor substrate. The first semiconductor substrate has a first conductivity type. The method further includes forming a plurality of second semiconductor mesa structures at a second semiconductor substrate. The second semiconductor substrate has a second conductivity type. The method further includes providing a glass substrate between the first semiconductor substrate and the second semiconductor substrate. The method includes connecting the first semiconductor substrate to the second semiconductor substrate so that at least a portion of the glass substrate is located laterally between the first semiconductor mesa structures of the plurality of first semiconductor mesa structures and the second semiconductor mesa structures of the plurality of second semiconductor mesa structures.
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公开(公告)号：US20210210669A1
公开(公告)日：2021-07-08
申请号：US17208495
申请日：2021-03-22
Applicant: Infineon Technologies AG
Inventor： Christian Kasztelan , Alexander Breymesser , Manfred Mengel , Andreas Niederhofer
Abstract: A method includes forming a plurality of first semiconductor mesa structures at a first semiconductor substrate. The first semiconductor substrate has a first conductivity type. The method further includes forming a plurality of second semiconductor mesa structures at a second semiconductor substrate. The second semiconductor substrate has a second conductivity type. The method further includes providing a glass substrate between the first semiconductor substrate and the second semiconductor substrate. The method includes connecting the first semiconductor substrate to the second semiconductor substrate so that at least a portion of the glass substrate is located laterally between the first semiconductor mesa structures of the plurality of first semiconductor mesa structures and the second semiconductor mesa structures of the plurality of second semiconductor mesa structures.
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公开(公告)号：US10535542B2
公开(公告)日：2020-01-14
申请号：US15662293
申请日：2017-07-28
Applicant: Infineon Technologies AG
Inventor： Andreas Niederhofer , Manfred Mengel , Holger Tamme , Nina Wenger
IPC: B65D73/02 , H01L21/677 , H01L21/673 , H01L21/683
Abstract: Various embodiments provide a wafer box. The wafer box may include a housing with a receiving space for receiving at least one wafer arranged above a housing base, at least one fixing structure which is connected to the housing base and which extends from the housing base, and at least one fixing device which is fastenable to the at least one fixing structure at a variable distance from the housing base. The fixing device and the fixing structure are designed such that the at least one wafer for arrangement in the receiving space can be fixed in a position by means of the at least one fixing device fastened to the fixing structure.
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