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    MICROCONTROLLER AND POWER MANAGEMENT INTEGRATED CIRCUIT APPLICATION CLUSTERING FOR SAFE STATE MANAGEMENT
    3.
    发明申请
    MICROCONTROLLER AND POWER MANAGEMENT INTEGRATED CIRCUIT APPLICATION CLUSTERING FOR SAFE STATE MANAGEMENT 有权

    公开(公告)号：US20220229486A1

    公开(公告)日：2022-07-21

    申请号：US17152862

    申请日：2021-01-20

    Applicant: Infineon Technologies AG

    Inventor： Konstantin Ivanchenko ,  Cristian Garbossa ,  Bejoy Mathews

    IPC: G06F1/3234 ,  G06F1/3206

    Abstract: Systems, methods, and circuitries are provided for controlling a microcontroller (MCU) on a per-application basis. A control system includes a microcontroller unit (MCU) including a first application group and a second application group. The first application group includes at least one hardware component not associated with the second application group. The control system includes a power management integrated circuit (PMIC). The PMIC includes monitoring circuitry configured to monitor the first application group to detect a first application group fault condition and monitor the second application group to detect a second application group fault condition. Based on the monitoring, the PMIC provides a first reset signal to the first application group that does not reset the second application group or provides a second reset signal to the second application group that does not reset the first application group.

    METHOD AND DEVICE FOR HANDLING SAFETY CRITICAL ERRORS
    5.
    发明申请
    METHOD AND DEVICE FOR HANDLING SAFETY CRITICAL ERRORS 有权
    用于处理安全关键错误的方法和装置

    公开(公告)号：US20160264150A1

    公开(公告)日：2016-09-15

    申请号：US15041789

    申请日：2016-02-11

    Applicant: Infineon Technologies AG

    Inventor： Axel Freiwald ,  Bejoy Mathews ,  Antonio Vilela

    IPC: B60W50/029 ,  B60R16/023 ,  G05B9/03

    CPC classification number: B60W50/029 ,  B60W50/023 ,  B60W2050/0018 ,  B60W2050/0292 ,  G05B9/03

    Abstract: A device for operating an apparatus comprising a first controller configured to be controlled by a first control signal, a second controller configured to be controlled by a second control signal, a control unit operatively connected to the first controller and the second controller, wherein the first controller and the second controller are both configured to operate the apparatus.

    Abstract translation: 一种用于操作装置的装置，包括被配置为由第一控制信号控制的第一控制器，被配置为由第二控制信号控制的第二控制器，可操作地连接到第一控制器和第二控制器的控制单元， 控制器和第二控制器都被配置为操作设备。

    Microcontroller and power management integrated circuit application clustering for safe state management
    6.
    发明授权
    Microcontroller and power management integrated circuit application clustering for safe state management 有权

    公开(公告)号：US11493982B2

    公开(公告)日：2022-11-08

    申请号：US17152862

    申请日：2021-01-20

    Applicant: Infineon Technologies AG

    Inventor： Konstantin Ivanchenko ,  Cristian Garbossa ,  Bejoy Mathews

    IPC: G06F1/3234 ,  G06F1/3206

    Abstract: Systems, methods, and circuitries are provided for controlling a microcontroller (MCU) on a per-application basis. A control system includes a microcontroller unit (MCU) including a first application group and a second application group. The first application group includes at least one hardware component not associated with the second application group. The control system includes a power management integrated circuit (PMIC). The PMIC includes monitoring circuitry configured to monitor the first application group to detect a first application group fault condition and monitor the second application group to detect a second application group fault condition. Based on the monitoring, the PMIC provides a first reset signal to the first application group that does not reset the second application group or provides a second reset signal to the second application group that does not reset the first application group.

    Systems, devices, and methods for controller devices handling fault events
    8.
    发明授权
    Systems, devices, and methods for controller devices handling fault events 有权

    公开(公告)号：US12007820B2

    公开(公告)日：2024-06-11

    申请号：US17337650

    申请日：2021-06-03

    Applicant: Infineon Technologies AG

    Inventor： Konstantin Ivanchenko ,  Petru Bacinski ,  Bejoy Mathews

    IPC: G06F1/30 ,  G06F11/07 ,  G06F11/20

    CPC classification number: G06F1/30 ,  G06F11/0721 ,  G06F11/079 ,  G06F11/2015

    Abstract: A controller chip includes a first cluster including one or more first controller units, a first power supply grid, a first clock tree structure to supply one or more clock signals, and at least a first power supply input. A second cluster includes one or more second controller units, a second power supply grid, a second clock tree structure to supply one or more clock signals, and at least a second power supply input. A monitoring cluster includes a monitoring circuit configured to: monitor the power supply and the clock signal supply of each of the first cluster and second cluster, and in the event of determining at least one of a power supply failure or a clock signal supply failure in one cluster of the first cluster or the second cluster, indicate the failure to the other cluster to take one or more actions.

    SYSTEMS, DEVICES, AND METHODS FOR CONTROLLER DEVICES HANDLING FAULT EVENTS
    9.
    发明申请
    SYSTEMS, DEVICES, AND METHODS FOR CONTROLLER DEVICES HANDLING FAULT EVENTS 有权

    公开(公告)号：US20210382536A1

    公开(公告)日：2021-12-09

    申请号：US17337650

    申请日：2021-06-03

    Applicant: Infineon Technologies AG

    Inventor： Konstantin Ivanchenko ,  Petru Bacinski ,  Bejoy Mathews

    IPC: G06F1/30 ,  G06F11/07

    Abstract: A controller chip includes a first cluster including one or more first controller units, a first power supply grid, a first clock tree structure to supply one or more clock signals, and at least a first power supply input. A second cluster includes one or more second controller units, a second power supply grid, a second clock tree structure to supply one or more clock signals, and at least a second power supply input. A monitoring cluster includes a monitoring circuit configured to: monitor the power supply and the clock signal supply of each of the first cluster and second cluster, and in the event of determining at least one of a power supply failure or a clock signal supply failure in one cluster of the first cluster or the second cluster, indicate the failure to the other cluster to take one or more actions.

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