公开(公告)号：US20230282736A1

公开(公告)日：2023-09-07

申请号：US17686506

申请日：2022-03-04

Applicant: Infineon Technologies AG

Inventor： Rabie Djemour ,  Hannes Mathias Geike ,  Anton Mauder

IPC: H01L29/739 ,  H01L29/06 ,  H01L29/40

CPC classification number: H01L29/7397 ,  H01L29/0615 ,  H01L29/407

Abstract: A semiconductor die includes: a semiconductor substrate; transistor cells formed in a first region of the semiconductor substrate and electrically coupled in parallel to form a power transistor, the transistor cells including first trenches that extend from a first surface of the semiconductor substrate into the first region; a gate pad formed above the first surface and electrically connected to gate electrodes in the first trenches, the gate pad being formed over a second region of the semiconductor substrate that is devoid of functional transistor cells; second trenches extending from the first surface into the second region and including gate electrodes that are electrically connected to the gate pad and form a first conductor of an additional input capacitance of the power transistor; and a second conductor of the additional input capacitance formed in the second region adjacent the second trenches. Methods of producing the semiconductor die are also described.