公开(公告)号：US20220309169A1

公开(公告)日：2022-09-29

申请号：US17700643

申请日：2022-03-22

Applicant: Infineon Technologies AG

Inventor： Joerg Syassen ,  Avni Bildhaiya ,  Andreas Graefe ,  Albrecht Mayer ,  Manuela Meier ,  Viola Rieger

IPC: G06F21/60 ,  G06F21/70

Abstract: A device includes a safety domain having a processing unit and a memory and is configured to provide at least one functionality and to implement one more safety measures for detecting faults. The safety domain is configured to transmit at least one alarm signal indicating one or more detected errors in response to detecting the faults. The device further includes a security domain having a processing unit and a memory and is configured to provide cryptographic services and to obtain alarm signals. The security domain is configured to perform security-related operations in a secure state in response to obtaining an alarm signal from the safety domain.

公开(公告)号：US20230401341A1

公开(公告)日：2023-12-14

申请号：US17805984

申请日：2022-06-08

Applicant: Infineon Technologies AG

Inventor： Albrecht Mayer ,  Joerg Syassen ,  Glenn Ashley Farrall ,  Manfred Zimmerman

IPC: G06F21/78

CPC classification number: G06F21/78 ,  H04L9/3247

Abstract: A non-volatile memory (NVM) system external to a processor comprising an NVM and a memory controller may perform various aspects of the techniques. The NVM may store a first cryptographic signature and first data. The memory controller may, responsive to a first write request to write updated data to at least a portion of the NVM, to store the updated data in the NVM along with the first data to create second data. The memory controller may also generate, a second cryptographic signature that always differs from the first cryptographic signature, and store the second cryptographic signature as a current cryptographic signature. The memory controller may further output, to the processor, the current cryptographic signature as a reference signature, where the memory controller always replaces the current cryptographic signature, with cryptographic properties, whenever the NVM is written to and does not otherwise permit writing the current cryptographic signature.