公开(公告)号：US20220224323A1

公开(公告)日：2022-07-14

申请号：US17565552

申请日：2021-12-30

申请人： Infineon Technologies AG

发明人： Markus Sievers ,  Michael Glavanovics ,  Dethard Peters

IPC分类号： H03K17/082

摘要： A device is provided that includes a power transistor and an overcurrent detection logic. The overcurrent detection logic has a first stable state providing a first signal level on a status output terminal and a second stable state providing a second signal level on the status output terminal. The overcurrent detection logic changes from the first stable state to the second stable state in response to detecting that a current through the power transistor exceeds a current limit. The overcurrent detection logic remains in the second state when the current through the transistor drops below the limit after exceeding the current limit.

公开(公告)号：US11799467B2

公开(公告)日：2023-10-24

申请号：US17565552

申请日：2021-12-30

申请人： Infineon Technologies AG

发明人： Markus Sievers ,  Michael Glavanovics ,  Dethard Peters

IPC分类号： H03K17/082 ,  H02H3/08

CPC分类号： H03K17/0822 ,  H02H3/08

摘要： A device is provided that includes a power transistor and an overcurrent detection logic. The overcurrent detection logic has a first stable state providing a first signal level on a status output terminal and a second stable state providing a second signal level on the status output terminal. The overcurrent detection logic changes from the first stable state to the second stable state in response to detecting that a current through the power transistor exceeds a current limit. The overcurrent detection logic remains in the second state when the current through the transistor drops below the limit after exceeding the current limit.