公开(公告)号：US20240371772A1

公开(公告)日：2024-11-07

申请号：US18640821

申请日：2024-04-19

Applicant: Infineon Technologies AG

Inventor： Saurabh Roy ,  Josef Schätz ,  Dethard Peters ,  Hans-Joachim Schulze

IPC: H01L23/532 ,  H01L29/16 ,  H01L29/66 ,  H01L29/78

Abstract: A vertical power semiconductor device is proposed. The vertical power semiconductor device includes a silicon carbide (SIC) semiconductor body including a trench structure. The trench structure extends into the SiC semiconductor body at a first surface of the SiC semiconductor body. The trench structure includes a gate electrode and a gate dielectric arranged between the gate electrode and the SiC semiconductor body. An interlayer dielectric structure is arranged on the trench structure. The interlayer dielectric structure includes at least one of an aluminum nitride layer, a silicon nitride layer, an aluminum oxide layer, or a boron nitride layer. The vertical power semiconductor device further includes a source or emitter electrode on the interlayer dielectric structure.

公开(公告)号：US20240072122A1

公开(公告)日：2024-02-29

申请号：US18364519

申请日：2023-08-03

Applicant: Infineon Technologies AG

Inventor： Michael Hell ,  Rudolf Elpelt ,  Caspar Leendertz ,  Bernd Zippelius ,  Dethard Peters

IPC: H01L29/16 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/1608 ,  H01L29/0696 ,  H01L29/4236 ,  H01L29/66068 ,  H01L29/66734 ,  H01L29/7813

Abstract: A semiconductor device includes a transistor including transistor cells. Each transistor cells has a gate electrode arranged in gate trenches formed in a first portion of a silicon carbide substrate and extending in a first horizontal direction, a source region, a channel region, and a current-spreading region. The source region, channel region, and at least part of the current-spreading region are arranged in ridges patterned by the gate trenches. The transistor cells further include a body contact portion of the second conductivity type arranged in a second portion of the silicon carbide substrate and electrically connected to the channel region. The transistor cells further include a shielding region of the second conductivity type. A first portion of the shielding region is arranged below the gate trenches, respectively, and a second portion of the shielding region is arranged adjacent to a sidewall of the gate trenches, respectively.

公开(公告)号：US20220224323A1

公开(公告)日：2022-07-14

申请号：US17565552

申请日：2021-12-30

Applicant: Infineon Technologies AG

Inventor： Markus Sievers ,  Michael Glavanovics ,  Dethard Peters

IPC: H03K17/082

Abstract: A device is provided that includes a power transistor and an overcurrent detection logic. The overcurrent detection logic has a first stable state providing a first signal level on a status output terminal and a second stable state providing a second signal level on the status output terminal. The overcurrent detection logic changes from the first stable state to the second stable state in response to detecting that a current through the power transistor exceeds a current limit. The overcurrent detection logic remains in the second state when the current through the transistor drops below the limit after exceeding the current limit.

公开(公告)号：US20220102487A1

公开(公告)日：2022-03-31

申请号：US17489365

申请日：2021-09-29

Applicant: Infineon Technologies AG

Inventor： Ralf Siemieniec ,  Wolfgang Jantscher ,  David Kammerlander ,  Dethard Peters ,  Joachim Weyers

IPC: H01L29/06 ,  H01L29/16 ,  H01L29/10 ,  H01L29/78

Abstract: A transistor cell includes a gate electrode and a source region of a first conductivity type. A drain/drift region is formed in a silicon carbide body. A buried region of the second conductivity type and the drain/drift region form a pn junction. The buried region and a well region form a unipolar junction. A mean net dopant density N2 of the buried region is higher than a mean net dopant density N1 of the well region. A first clamp region of the first conductivity type extends into the well region. A first low-resistive ohmic path electrically connects the first clamp region and the gate electrode. A second clamp region of the first conductivity type extends into the well region. A second low-resistive ohmic path electrically connects the second clamp region and the source region.

公开(公告)号：US20220093761A1

公开(公告)日：2022-03-24

申请号：US17473917

申请日：2021-09-13

Applicant: Infineon Technologies AG

Inventor： Ralf Siemieniec ,  Dethard Peters

IPC: H01L29/423 ,  H01L23/482 ,  H01L29/06 ,  H01L29/16 ,  H01L29/417 ,  H01L29/40 ,  H01L29/78

Abstract: In an example, a silicon carbide device includes a silicon carbide body. The silicon carbide body includes a central region and a peripheral region surrounding the central region. The central region includes a source region of a first conductivity type. The peripheral region includes a doped region of a second conductivity type. A stripe-shaped gate electrode extends through the central region and into the peripheral region. A contiguous source metallization is formed on the central region and on an inner portion of the peripheral region. The contiguous source metallization and the source region form a first ohmic contact in the central region. The contiguous source metallization and the doped region form a second ohmic contact in the peripheral region.

公开(公告)号：US11101343B2

公开(公告)日：2021-08-24

申请号：US16404284

申请日：2019-05-06

Applicant: Infineon Technologies AG

Inventor： Ralf Siemieniec ,  Thomas Aichinger ,  Thomas Basler ,  Wolfgang Bergner ,  Rudolf Elpelt ,  Romain Esteve ,  Michael Hell ,  Daniel Kueck ,  Caspar Leendertz ,  Dethard Peters ,  Hans-Joachim Schulze

IPC: H01L29/06 ,  H01L29/78 ,  H01L29/16 ,  H01L21/04 ,  H01L29/66 ,  H01L29/10

Abstract: A semiconductor component has a gate structure that extends from a first surface into an SiC semiconductor body. A body area in the SiC semiconductor body adjoins a first side wall of the gate structure. A first shielding area and a second shielding area of the conductivity type of the body area have at least twice as high a level of doping as the body area. A diode area forms a Schottky contact with a load electrode between the first shielding area and the second shielding area.

公开(公告)号：US10811499B2

公开(公告)日：2020-10-20

申请号：US16442022

申请日：2019-06-14

Applicant: Infineon Technologies AG

Inventor： Ralf Siemieniec ,  Dethard Peters

IPC: H01L29/78 ,  H01L29/16 ,  H03K17/14 ,  H01L49/02 ,  H01L29/08 ,  H01L23/34 ,  H01L29/06 ,  H01L29/10 ,  H01L29/167 ,  H01L29/417 ,  H01L29/423 ,  H01L27/06 ,  H01L27/02 ,  H01L21/82 ,  H01L27/07

Abstract: A semiconductor device includes transistor cells in a semiconductor portion, wherein the transistor cells are electrically connected to a gate metallization, a source electrode and a drain electrode. In one example, the semiconductor device further includes a doped region in the semiconductor portion. The doped region is electrically connected to the source electrode. A resistance of the doped region has a negative temperature coefficient. An interlayer dielectric separates the gate metallization from the doped region. A drain structure in the semiconductor portion electrically connects the transistor cells with the drain electrode and forms a pn junction with the doped region.

公开(公告)号：US10734514B2

公开(公告)日：2020-08-04

申请号：US16054419

申请日：2018-08-03

Applicant: Infineon Technologies AG

Inventor： Thomas Aichinger ,  Romain Esteve ,  Dethard Peters ,  Roland Rupp ,  Ralf Siemieniec

IPC: H01L29/78 ,  H01L29/08 ,  H01L29/66 ,  H01L29/739 ,  H01L27/06 ,  H01L29/06 ,  H01L29/40 ,  H01L29/417 ,  H01L29/36 ,  H01L29/861 ,  H01L29/872 ,  H01L29/04

Abstract: A semiconductor device includes trench structures that extend from a first surface into a semiconductor body. The trench structures include a gate structure and a contact structure that extends through the gate structure, respectively. Transistor mesas are between the trench structures. Each transistor mesa includes a body zone forming a first pn junction with a drift structure and a second pn junction with a source zone. Diode regions directly adjoin one of the contact structures form a third pn junction with the drift structure, respectively.

公开(公告)号：US10714609B2

公开(公告)日：2020-07-14

申请号：US16385817

申请日：2019-04-16

Applicant: Infineon Technologies AG

Inventor： Thomas Aichinger ,  Dethard Peters ,  Ralf Siemieniec

IPC: H01L29/78 ,  H01L29/06 ,  H01L27/02 ,  H01L27/06 ,  H01L29/08 ,  H01L29/10 ,  H01L29/423 ,  H01L29/739 ,  H01L27/07 ,  H01L29/861 ,  H01L29/04 ,  H01L29/16

Abstract: A semiconductor device includes a plurality of gate trenches formed in a first surface of a semiconductor body and extending lengthwise parallel to one another, transistor cells and diode regions formed in a mesa of the semiconductor body between neighboring ones of the gate trenches, and a drift region in the semiconductor body beneath the gate trenches. Each transistor cell includes a source zone and a body region. Each diode region includes a contact portion and a lower doped shielding portion. The source zone forms a first p-n junction with the body region, and the body region forms a second p-n junction with the drift region. The contact region extends to the first surface, and the shielding portion forms a third p-n junction with the drift region. The shielding portion extends under bottoms of the neighboring ones of the gate trenches.

公开(公告)号：US10700192B2

公开(公告)日：2020-06-30

申请号：US16256453

申请日：2019-01-24

Applicant: Infineon Technologies AG

Inventor： Ralf Siemieniec ,  Wolfgang Bergner ,  Romain Esteve ,  Dethard Peters

IPC: H01L29/78 ,  H01L29/16 ,  H01L29/04 ,  H01L29/10 ,  H01L29/417 ,  H01L29/423 ,  H01L29/66 ,  H01L29/739 ,  H01L29/08 ,  H01L29/06 ,  H01L29/872 ,  H01L21/265 ,  H01L21/3115 ,  H01L29/36 ,  H01L29/861

Abstract: A semiconductor device includes a semiconductor body and at least one device cell integrated in the semiconductor body. Each device cell includes a drift region, a source region, and a body region arranged between the source region and the drift region. A gate trench extends from a first surface of the semiconductor body, through the source and body regions and into the drift region. A diode region extends under the gate trench. A pn junction is formed between the diode and drift regions below the gate trench. A gate electrode arranged in the gate trench is dielectrically insulated from the source, body, diode and drift regions by a gate dielectric. A contact trench spaced apart from the gate trench extends from the first surface into the source region. A source electrode arranged in the contact trench adjoins the source region at a sidewall of the contact trench.