公开(公告)号：US20240171210A1

公开(公告)日：2024-05-23

申请号：US18503765

申请日：2023-11-07

Applicant: Infineon Technologies AG

Inventor： Johannes Klaus Rimmelspacher ,  Valentyn Solomko ,  Andreas Bänisch ,  Rüdiger Bauder ,  Ralf Schnieder ,  Martin Pauer

IPC: H04B1/401 ,  H03K5/135 ,  H04B7/005 ,  H04J3/06

CPC classification number: H04B1/401 ,  H03K5/135 ,  H04B7/005 ,  H04J3/0635

Abstract: According to an embodiment, a device includes an interface configured to receive a first clock signal. A delay circuit is configured to add variable delays to the first clock signal based on a delay control signal to generate a second clock signal with variable delays. A delay control signal is generated by a controller clocked by the second clock signal. The device further includes a radio frequency path, and the device is configured to control the radio frequency path based on the second clock signal.