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公开(公告)号:US20240364271A1
公开(公告)日:2024-10-31
申请号:US18636994
申请日:2024-04-16
Applicant: Infineon Technologies AG
Inventor: Rüdiger Bauder , Mikhail Shirokov
CPC classification number: H03F1/0288 , H03F3/211 , H03F2200/451
Abstract: An inverted Doherty-type amplifier comprises a distribution network having a first input port; a main signal path coupled to a first output port of the distribution network, the main signal path comprising a main amplifier; a first peak signal path coupled to a second output port of the distribution network, the first peak signal path comprising a first phase adjustment network, a first peak amplifier having an input coupled to an output of the first phase adjustment network, and a second phase adjustment network having an input coupled to an output of the first peak amplifier; and a combining network coupled to an output of the main amplifier and an output of the second phase adjustment network.
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公开(公告)号:US20240171210A1
公开(公告)日:2024-05-23
申请号:US18503765
申请日:2023-11-07
Applicant: Infineon Technologies AG
Inventor: Johannes Klaus Rimmelspacher , Valentyn Solomko , Andreas Bänisch , Rüdiger Bauder , Ralf Schnieder , Martin Pauer
CPC classification number: H04B1/401 , H03K5/135 , H04B7/005 , H04J3/0635
Abstract: According to an embodiment, a device includes an interface configured to receive a first clock signal. A delay circuit is configured to add variable delays to the first clock signal based on a delay control signal to generate a second clock signal with variable delays. A delay control signal is generated by a controller clocked by the second clock signal. The device further includes a radio frequency path, and the device is configured to control the radio frequency path based on the second clock signal.
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