公开(公告)号：US20190341359A1

公开(公告)日：2019-11-07

申请号：US16297835

申请日：2019-03-11

Applicant: Infinera Corporation

Inventor： Jie Tang ,  Jiaming Zhang ,  Timothy Butrie ,  John W. Osenbach ,  Fred Kish, JR.

IPC: H01L23/00 ,  H01L23/16 ,  H01L23/538

Abstract: Consistent with the present disclosure, the back side of a chip is attached to a lid structure. Legs are attached or integrated monolithically to the lid such that the legs are provided in and around the periphery of the lid and are designed in such a way as to not interfere with the optical output/input (facet) of the PIC, for example, by not putting the leg or a portion of the leg in front of the optical output/input region of the PIGC. Since the lid, to which the chip is attached, is secured to the substrate, the electrical connections between the chip and the substrate are also subject to little, if any, mechanical stress, thereby obviating the need for the underfill. Accordingly, electrical traces on the chip and the substrate do not contact a high dielectric constant material, and, as a result, impedance and loss may be reduced. Moreover, optical devices, if integrated on the chip as in a PIC, are not subject to stresses caused by underfill so that the optical properties of such devices may be preserved.

公开(公告)号：US20190391348A1

公开(公告)日：2019-12-26

申请号：US16279874

申请日：2019-02-19

Applicant: Infinera Corporation

Inventor： John Osenbach ,  Jiaming Zhang ,  Xiaofeng Han ,  Timothy Butrie ,  Fred Kish, JR.

IPC: G02B6/42 ,  H04B10/40

Abstract: An optical transceiver package comprising a transceiver module, a digital signal processor (DSP), a substrate supporting the transceiver module and the DSP, and a barrier to mechanically protect and thermally insulate the transceiver module. The substrate comprises a material having a coefficient of thermal expansion (CTE) of 2.3-14 ppm/° C. and the barrier comprises a material having a CTE of 3.5-14 ppm/° C.