公开(公告)号：US10804858B2

公开(公告)日：2020-10-13

申请号：US16258145

申请日：2019-01-25

Applicant: Integrated Device Technology, Inc.

Inventor： Samet Zihir ,  Himanshu Khatri ,  Tumay Kanar

IPC: H03F3/04 ,  H03F1/08 ,  H03F3/24 ,  H03F1/02

Abstract: An apparatus comprises an amplifier circuit and a bias circuit. The bias circuit is generally configured to dynamically adjust a bias voltage reference at a bias node connected to one or more input transistors of the amplifier circuit to maintain a low baseband impedance.

公开(公告)号：US20200295798A1

公开(公告)日：2020-09-17

申请号：US16737180

申请日：2020-01-08

Applicant: Integrated Device Technology, Inc.

Inventor： Samet Zihir ,  Tumay Kanar ,  Himanshu Khatri

IPC: H04B1/44 ,  H04B7/10

Abstract: An apparatus includes a transmit-receive switch circuit and a detector circuit. The transmit-receive switch circuit may be connected between an input port, an output port, and a common port, and configured to switch a transmit radio-frequency signal from the input port to the common port in a transmit mode and a receive radio-frequency signal from the common port to the output port in a receive mode. The detector circuit may be integrated within the transmit-receive switch and may be configured to generate a power detection signal in response to at least one of the transmit radio-frequency signal or the receive radio-frequency signal.

公开(公告)号：US10998931B2

公开(公告)日：2021-05-04

申请号：US16737180

申请日：2020-01-08

Applicant: Integrated Device Technology, Inc.

Inventor： Samet Zihir ,  Tumay Kanar ,  Himanshu Khatri

IPC: H04B1/40 ,  H04B17/00 ,  H04B1/44 ,  H04B7/10

Abstract: An apparatus includes a transmit-receive switch circuit and a detector circuit. The transmit-receive switch circuit may be connected between an input port, an output port, and a common port, and configured to switch a transmit radio-frequency signal from the input port to the common port in a transmit mode and a receive radio-frequency signal from the common port to the output port in a receive mode. The detector circuit may be integrated within the transmit-receive switch and may be configured to generate a power detection signal in response to at least one of the transmit radio-frequency signal or the receive radio-frequency signal.

公开(公告)号：US10763913B1

公开(公告)日：2020-09-01

申请号：US16372698

申请日：2019-04-02

Applicant: Integrated Device Technology, Inc.

Inventor： Himanshu Khatri ,  Samet Zihir ,  Tumay Kanar

IPC: H04B1/44 ,  H04B1/18 ,  H03F3/19 ,  H03G3/30 ,  H03F3/04 ,  H04B1/04

Abstract: An apparatus includes a log amplifier and a calibration circuit. The log amplifier may be configured to generate an output signal in response to an offset between a first voltage and a second voltage. The calibration circuit may be configured to disconnect an input power and perform a cancellation of the offset when the input power is not present. The first voltage may be generated by the apparatus in response to a power detection. The second voltage may be received from a reference circuit. The cancellation of the offset may extend a working range of the apparatus. The output may provide a linear-in-dB power detection.

公开(公告)号：US10750377B1

公开(公告)日：2020-08-18

申请号：US16367711

申请日：2019-03-28

Applicant: Integrated Device Technology, Inc.

Inventor： Samet Zihir ,  Kevin Sheng ,  Mark Cuezon ,  Himanshu Khatri

IPC: H04L12/28 ,  H04W16/28 ,  H04B7/185 ,  H01Q3/26 ,  H04W72/04

Abstract: An apparatus comprises a plurality of transceiver circuits, a memory, and an interface circuit. The memory generally embodies a table associating a plurality of index values with corresponding gain and phase values for each channel of each of the transceiver circuits. In a first mode, the interface circuit may be configured to receive the corresponding gain and phase values associated with each of the plurality of index values and store the corresponding gain and phase values in the table. In a second mode, the interface circuit, in response to receiving one of the index values, configures each channel of each of the transceiver circuits with the corresponding gain and phase values from the table.

公开(公告)号：US20200244228A1

公开(公告)日：2020-07-30

申请号：US16258145

申请日：2019-01-25

Applicant: Integrated Device Technology, Inc.

Inventor： Samet Zihir ,  Himanshu Khatri ,  Tumay Kanar

IPC: H03F1/08 ,  H03F1/02 ,  H03F3/24

Abstract: An apparatus comprises an amplifier circuit and a bias circuit. The bias circuit is generally configured to dynamically adjust a bias voltage reference at a bias node connected to one or more input transistors of the amplifier circuit to maintain a low baseband impedance.

公开(公告)号：US10536186B1

公开(公告)日：2020-01-14

申请号：US16354650

申请日：2019-03-15

Applicant: Integrated Device Technology, Inc.

Inventor： Samet Zihir ,  Tumay Kanar ,  Himanshu Khatri

IPC: H04B1/40 ,  H04B17/00 ,  H04B1/44 ,  H04B7/10

Abstract: An apparatus includes a plurality of impedance matching networks, a common port, a first switch circuit and a second switch circuit. The impedance matching networks may be (i) connected in series between an input port and an output port and (ii) configured to generate a power detection signal in response to a radio-frequency signal. The radio-frequency signal may be a transmit signal or a receive signal. The common port may be (i) connected to the impedance matching networks and (ii) connectable to an antenna. The first switch circuit may be configured to switch the input port and a circuit ground potential. The second switch circuit may be configured to switch the output port and the circuit ground potential.