公开(公告)号：US20230325185A1

公开(公告)日：2023-10-12

申请号：US18194252

申请日：2023-03-31

Applicant: Intel Corporation

Inventor： Jesmin Jahan Tithi ,  Fabio Checconi ,  Ahmed Helal ,  Fabrizio Petrini

IPC: G06F9/30 ,  G06F12/08

CPC classification number: G06F9/3001 ,  G06F12/08 ,  G06F2213/28

Abstract: Systems, apparatus, articles of manufacture, and methods are disclosed for performance of sparse matrix time dense matrix operations. Example instructions cause programmable circuitry to control execution of the sparse matrix times dense matrix operation using a sparse matrix and a dense matrix stored in memory, and transmit a plurality of instructions to execute the sparse matrix times dense matrix operation to DMA engine circuitry, the plurality of instructions to cause DMA engine circuitry to create an output matrix in the memory, the creation of the output matrix in the memory performed without the programmable circuitry computing the output matrix.