公开(公告)号：US20200373259A1

公开(公告)日：2020-11-26

申请号：US16421315

申请日：2019-05-23

Applicant: Intel Corporation

Inventor： Sonja KOLLER ,  Kilian ROTH ,  Josef HAGN ,  Andreas WOLTER ,  Andreas AUGUSTIN

IPC: H01L23/66 ,  H01L23/31 ,  H01L23/538 ,  H01L23/552 ,  H01L21/48 ,  H01L21/56 ,  H01P3/00 ,  H01P11/00 ,  H01Q1/22

Abstract: Embodiments include semiconductor packages and methods of forming the semiconductor packages. A semiconductor package includes a die over a substrate, a first conductive layer over the die, and a conductive cavity antenna over the first conductive layer and substrate. The conductive cavity antenna includes a conductive cavity, a cavity region, and a plurality of interconnects. The conductive cavity is over the first conductive layer and surrounds the cavity region. The semiconductor package also includes a second conductive layer over the conductive cavity antenna, first conductive layer, and substrate. The conductive cavity extends vertically from the first conductive layer to the second conductive layer. The cavity region may be embedded with the conductive cavity, the first conductive layer, and the second conductive layer. The plurality of interconnects may include first, second, and third interconnects. The first interconnects may include through-mold vias (TMVs), through-silicon vias (TSVs), conductive sidewalls, or conductive trenches.