公开(公告)号：US20200266967A1

公开(公告)日：2020-08-20

申请号：US16783077

申请日：2020-02-05

Applicant: Intel Corporation

Inventor： April E. FISHER ,  Benjamin CHEONG ,  Kevin BROSS ,  Manishkumar T. RANA ,  Andrew M. MONK

IPC: H04L7/00

Abstract: Examples described herein are used in timing synchronization systems. A timing synchronization system provides circuits that support bi-directional half-duplex voltage signals (transmit or receive) but protect against incorrect input/output configuration whereby a transmit signal media is connected to a receive port or a receive signal media is connected to a transmit port. The system provides configurable signal propagation by use of parallel connection of two or more buffer in series with a resistor. Various isolation circuitry and resistors can be used to protect against signal transmission during receive mode.