公开(公告)号：US20230290812A1

公开(公告)日：2023-09-14

申请号：US17654530

申请日：2022-03-11

Applicant: Intel Corporation

Inventor： Travis Lajoie ,  Andre Baran ,  Alexandra De Denko ,  Christine Radlinger ,  Yu-Che Chiu ,  Yixiong Zheng

IPC: H01L49/02 ,  H01L27/108

CPC classification number: H01L28/60 ,  H01L27/10808

Abstract: An integrated circuit (IC) includes a transistor, and a first layer including electrically conductive material. In an example, the first layer is conductively coupled to the transistor. The IC further includes a second layer including electrically conductive material above the first layer. The IC further includes one or more intervening layers between the first and second layers. In an example, the one or more intervening layers include at least a third layer, wherein the third layer includes (i) a first metal, (ii) oxygen, and (iii) one or both of a second metal or an oxide thereof within the third layer. In an example, the first layer, the second layer, and the one or more intervening layers form a metal-insulator-metal (MIM) capacitor. In an example, the MIM capacitor and the transistor, in combination, form a memory cell of a dynamic random access memory (DRAM) array.