公开(公告)号：US20200027503A1

公开(公告)日：2020-01-23

申请号：US16586214

申请日：2019-09-27

Applicant: Intel Corporation

Inventor： Lei CHEN ,  Yogesh B. WAKCHAURE ,  Aliasgar S. MADRASWALA ,  Xin GUO ,  Cole UHLMAN

IPC: G11C11/56 ,  G06F3/06 ,  G11C16/08

Abstract: A method and apparatus to reduce read retry operations in a NAND Flash memory is provided. To reduce the number of read retries for future reads, a word line group is assigned an optimal read voltage, the reference voltage that results in eliminating the read error for the word line is selected as the optimal read voltage (also referred to as a “sticky voltage”) for the word line group to be used for a next read of the page. An optimal read voltage per word line group for the page per NAND Flash memory die is stored in the lookup table. Storing an optimal read voltage per word line group instead of per die reduces the number of read retries.