公开(公告)号：US20210072908A1

公开(公告)日：2021-03-11

申请号：US16953138

申请日：2020-11-19

Applicant: Intel Corporation

Inventor： Chee Hak Teh ,  Curtis Wortman ,  Jeffrey Erik Schulz

IPC: G06F3/06 ,  G11C7/10 ,  G06F13/38

Abstract: A multichip package may include at least a main die mounted on a substrate. The main die may be coupled to one or more transceiver dies also mounted on the substrate. The main die may include one or more universal interface blocks configured to interface with an on-package memory device or an on-package expansion die, both of which can be mounted on the substrate. The expansion die may include external memory interface (EMIF) components for communicating with off-package memory devices and/or bulk random-access memory (RAM) components for storing large amounts of data for the main die. Smaller input-output blocks such as GPIO (general purpose input-output) or LVDS (low-voltage differential signaling) interfaces may be formed within the core fabric of the main die without causing routing congestion while providing the necessary clock source.

公开(公告)号：US11449247B2

公开(公告)日：2022-09-20

申请号：US16953138

申请日：2020-11-19

Applicant: Intel Corporation

Inventor： Chee Hak Teh ,  Curtis Wortman ,  Jeffrey Erik Schulz

IPC: G06F3/06 ,  G06F13/38 ,  G11C7/10

Abstract: A multichip package may include at least a main die mounted on a substrate. The main die may be coupled to one or more transceiver dies also mounted on the substrate. The main die may include one or more universal interface blocks configured to interface with an on-package memory device or an on-package expansion die, both of which can be mounted on the substrate. The expansion die may include external memory interface (EMIF) components for communicating with off-package memory devices and/or bulk random-access memory (RAM) components for storing large amounts of data for the main die. Smaller input-output blocks such as GPIO (general purpose input-output) or LVDS (low-voltage differential signaling) interfaces may be formed within the core fabric of the main die without causing routing congestion while providing the necessary clock source.