公开(公告)号：US20210013188A1

公开(公告)日：2021-01-14

申请号：US16641922

申请日：2017-09-28

Applicant: Intel Corporation

Inventor： Wilfred Gomes ,  Sanka Ganesan ,  DOUG INGERLY ,  ROBERT SANKMAN ,  MARK BOHR ,  DEBENDRA MALLIK

IPC: H01L25/10 ,  H01L25/065 ,  H01L25/00

Abstract: Systems and methods for providing a low profile stacked die semiconductor package in which a first semiconductor package is stacked with a second semiconductor package and both semiconductor packages are conductively coupled to an active silicon substrate that communicably couples the first semiconductor package to the second semiconductor package. The first semiconductor package may conductively couple to the active silicon substrate using a plurality of interconnects disposed in a first interconnect pattern having a first interconnect pitch. The second semiconductor package may conductively couple to the active silicon substrate using a plurality of interconnects disposed in a second interconnect pattern having a second pitch that is greater than the first pitch. The second semiconductor package may be stacked on the first semiconductor package and conductively coupled to the active silicon substrate using a plurality of conductive members or a plurality of wirebonds.