公开(公告)号：US20220221837A1

公开(公告)日：2022-07-14

申请号：US17710755

申请日：2022-03-31

Applicant: Intel Corporation

Inventor： Darshan Raj ,  Michael Schmidt ,  Serdar Gueltekin

IPC: G05B19/4063 ,  G05B19/418

Abstract: For example, an apparatus may include a motherboard including a functional processing core configured to perform a functionality having a Functional Safety (FuSa) level; a FuSa transceiver configured to communicate with an external safety-island processor, which is external to the motherboard; and a FuSa controller configured to establish a FuSa connection with the external safety-island processor according to the FuSa level, to send FuSa information corresponding to the functionality of the functional processing core to the external safety-island processor via the FuSa transceiver, and to control one or more FuSa operations of the functional processing core based on one or more control messages received from the external safety-island processor via the FuSa transceiver.

公开(公告)号：US12276963B2

公开(公告)日：2025-04-15

申请号：US17710755

申请日：2022-03-31

Applicant: Intel Corporation

Inventor： Darshan Raj ,  Michael Schmidt ,  Serdar Gueltekin

IPC: G05B19/4063 ,  G05B19/418

Abstract: For example, an apparatus may include a motherboard including a functional processing core configured to perform a functionality having a Functional Safety (FuSa) level; a FuSa transceiver configured to communicate with an external safety-island processor, which is external to the motherboard; and a FuSa controller configured to establish a FuSa connection with the external safety-island processor according to the FuSa level, to send FuSa information corresponding to the functionality of the functional processing core to the external safety-island processor via the FuSa transceiver, and to control one or more FuSa operations of the functional processing core based on one or more control messages received from the external safety-island processor via the FuSa transceiver.

公开(公告)号：US12248304B2

公开(公告)日：2025-03-11

申请号：US17213920

申请日：2021-03-26

Applicant: Intel Corporation

Inventor： Darshan Raj ,  Ralf Sengle

IPC: G05B19/418

Abstract: A data verifier, comprising: a first processing circuitry, configured to perform a first safety operation, the first safety operation comprising: determining whether first sensor data representing a second processing circuitry factor satisfy a first verification criterion; and if first verification criterion is satisfied, execute a first safety measure; and if the first verification criterion is not satisfied, execute a second safety measure; a second processing circuitry, configured to perform a second safety operation, the second safety operation comprising: determining whether a first value, generated by a third processing logic from sensor data satisfy a second verification criterion; and if the second verification criterion is satisfied, execute a third safety measure; and if the second verification criterion is not satisfied, execute a fourth safety measure.