公开(公告)号：US12231304B2

公开(公告)日：2025-02-18

申请号：US18037964

申请日：2020-12-21

Applicant: Intel Corporation

Inventor： Rameshkumar Illikkal ,  Anna Drewek-Ossowicka ,  Dharmisha Ketankumar Doshi ,  Qian Li ,  Andrzej Kuriata ,  Andrew J. Herdrich ,  Teck Joo Goh ,  Daniel Richins ,  Slawomir Putyrski ,  Wenhui Shu ,  Long Cui ,  Jinshi Chen ,  Mihai Daniel Dodan

IPC: H04L41/5019 ,  G06F9/50

Abstract: Various approaches to efficiently allocating and utilizing hardware resources in data centers while maintaining compliance with a service level objective (SLO) specified for a computational workload is translated into a hardware-level SLO to facilitate direct enforcement by the hardware processor, e.g., using a feedback control loop or model-based mapping of the hardware-level SLO to allocations of microarchitecture resources of the processor. In some embodiments, a computational model of the hardware behavior under resource contention is used to predict the application performance (e.g., as measured in terms of the hardware-level SLO) to be expected under certain contention scenarios. Scheduling of workloads among the compute nodes within the data center may be based on such predictions. In further embodiments, configurations of microservices are optimized to minimize hardware resources while meeting a specified performance goal.