公开(公告)号：US11710694B2

公开(公告)日：2023-07-25

申请号：US16421940

申请日：2019-05-24

Applicant: Intel Corporation

Inventor： Ebubekir Dogan ,  Ramanan Ehamparam ,  Jiho Kang

IPC: H01L23/52 ,  H01L23/31 ,  H01L23/48 ,  H01L25/18 ,  H01L25/16 ,  H01L23/522 ,  H01L25/065 ,  H01L23/00 ,  H01L23/528

CPC classification number: H01L23/5226 ,  H01L23/3128 ,  H01L23/5283 ,  H01L24/09 ,  H01L24/17 ,  H01L25/0655 ,  H01L2224/0401

Abstract: Integrated circuit (IC) structures include transistor devices with interconnect structures, e.g., a source contact, drain contact, and/or gate contact. The interconnect structures have rounded top surfaces. Contouring the top surfaces of transistor contacts may decrease the likelihood of electrical shorting and may permit a larger volume of insulating dielectric between adjacent contacts.

公开(公告)号：US20230317597A1

公开(公告)日：2023-10-05

申请号：US18329731

申请日：2023-06-06

Applicant: Intel Corporation

Inventor： Ebubekir Dogan ,  Ramanan Ehamparam ,  Jiho Kang

IPC: H01L23/522 ,  H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/528

CPC classification number: H01L23/5226 ,  H01L25/0655 ,  H01L24/09 ,  H01L23/3128 ,  H01L23/5283 ,  H01L24/17 ,  H01L2224/0401

Abstract: Integrated circuit (IC) structures include transistor devices with interconnect structures, e.g., a source contact, drain contact, and/or gate contact. The interconnect structures have rounded top surfaces. Contouring the top surfaces of transistor contacts may decrease the likelihood of electrical shorting and may permit a larger volume of insulating dielectric between adjacent contacts.

公开(公告)号：US20250006554A1

公开(公告)日：2025-01-02

申请号：US18215692

申请日：2023-06-28

Applicant: Intel Corporation

Inventor： Ramanan Ehamparam ,  Ebubekir Dogan ,  Maria Stancescu

IPC: H01L21/768 ,  H01L21/67

Abstract: Devices, systems, and techniques are described herein related to reducing or eliminating galvanic corrosion of tungsten conductive features within tungsten-boron liners during wet clean thereof. The tungsten-boron liner is treated with a hydrogen/nitrogen plasma to modify a portion of the liner extending from the top surface to include tungsten, boron, nitrogen, and optionally oxygen. The modified portion of the liner reduces or eliminates galvanic corrosion during wet etch clean.

公开(公告)号：US20200373236A1

公开(公告)日：2020-11-26

申请号：US16421940

申请日：2019-05-24

Applicant: Intel Corporation

Inventor： Ebubekir Dogan ,  Ramanan Ehamparam ,  Jiho Kang

IPC: H01L23/522 ,  H01L25/065 ,  H01L23/00 ,  H01L23/31 ,  H01L23/528

Abstract: Disclosed herein are integrated circuit (IC) structures with contoured interconnects, as well as related methods and devices. For example, in some embodiments, a device region of an IC die includes interconnects (e.g., source/drain contacts) that have rounded top surfaces.