公开(公告)号：US11069855B2

公开(公告)日：2021-07-20

申请号：US16459419

申请日：2019-07-01

Applicant: Intel Corporation

Inventor： Kevin L. Baker ,  Robert K. Grubbs ,  Farrell M. Good ,  Ervin T. Hill ,  Bhumika Chhabra ,  Jay S. Brown

IPC: H01L47/00 ,  H01L45/00 ,  H01L27/24

Abstract: An oxidation barrier for non-volatile memory with materials sensitive to temperature and/or cross contamination (e.g., chalcogenide materials) are described The barrier can be formed, for example, around the boundaries of a non-volatile memory tile (also known as a block or sub-array). For example, a non-volatile memory device can include an oxidation barrier on a side wall of a trench between adjacent memory tiles.